IEEE Journal of Solid-State Circuits

  • No Comments

A Waveform-Sharing Joint Radar-Communication Transceiver With PLL-Based Chirp Spread Spectrum Modulator

A Waveform-Sharing Joint Radar-Communication Transceiver With PLL-Based Chirp Spread Spectrum Modulator 150 150
Author(s): Xuan Wang, Xujun Ma, Lin Lu, Xuewei Fan, Qin Chen, Zhiqiang Liu, Haiyang Xia, Ziqi Liu, Shutao Ye, Ruibiao Liu, Yuqing Yang, Jingwei Zhang, Jing Feng, Yupeng Fu, Xu Wu, Dongming Wang, Lianming Li, Xiaohu You

Abstract:

A 60-GHz waveform-sharing joint radar-communication (JRC) transceiver with phase-locked loop (PLL)-based chirp spread spectrum (CSS) modulator is presented for seamless integrated sensing and communication (ISAC). Unlike existing communication-centric JRC transceivers that prioritize high throughput, the proposed sensing-centric transceiver employs unified CSS waveforms to perform uncompromised sensing performance while enabling …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 21
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3699468
Publisher: IEEE

View on IEEE Xplore

  • No Comments

An Incremental Noise-Shaping Pipeline ADC With Single-Amplification-Based kT/C Noise Cancellation Technique

An Incremental Noise-Shaping Pipeline ADC With Single-Amplification-Based kT/C Noise Cancellation Technique 150 150
Author(s): Zongnan Wang, Bingrui Li, Jiajun Tang, Zhongyi Wu, Haoyang Luo, Yuan Wang, Xiyuan Tang

Abstract:

This article presents an incremental noise-shaping (NS) pipeline analog-to-digital converter (ADC) featuring a single-amplification-based kT/C noise cancellation technique. By pre-amplifying the frontend sampling kT/C noise onto the capacitive digital-to-analog converter (CDAC) of the backend NS successive approximation register (SAR) quantizer, the proposed architecture eliminates the repeated amplifications typically …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698875
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Sub-μW Dual-Mode Reconfigurable Sensor Interface With Baseline Pre-Compensation for Multimodal V/I/R/C Sensing

A Sub-μW Dual-Mode Reconfigurable Sensor Interface With Baseline Pre-Compensation for Multimodal V/I/R/C Sensing 150 150
Author(s): Ting Zhou, Chao Wang, Jiajie Huang, Jian Zhao, Jinghua Zhang, Yong Lian, Yongfu Li

Abstract:

Compact, energy-efficient sensor interface circuits capable of multimodal sensing are essential for next-generation IoT and wearable devices. Present architectures, often relying on separate readout channels, face significant challenges regarding hardware complexity, dynamic range (DR) degradation due to sensor baseline variations, and susceptibility to low-frequency flicker noise. To address these issues, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698098
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 492.8-TOPS/W STT-MRAM Sparsity-Adaptive Compute-in-Memory Macro for Edge AI Inference

A 492.8-TOPS/W STT-MRAM Sparsity-Adaptive Compute-in-Memory Macro for Edge AI Inference 150 150
Author(s): Jia-Le Cui, Tingxuan Shi, Shuyu Wang, Hongjin Zhu, Haoran Du, Yan Cui, Yongliang Zhou, Zhiyuan Fu, Xin Si, Bo Liu, Noriyuki Miura, Hao Cai

Abstract:

The rapid proliferation of intelligent sensors has led to increased latency and privacy risks when processing data on a remote server. This work proposes a spin-transfer torque magnetic random access memory (STT-MRAM) compute-in-memory (CIM) macro to enhance inference efficiency for an artificial intelligence (AI) model on the edge device. A …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698324
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI 150 150
Author(s): Haisu Ju, Yingtao Zou, Gabriel M. Rebeiz

Abstract:

This article presents a 6.3–18.4GHz in-phase and quadrature (I/Q) direct down-conversion receiver featuring reconfigurability in both the radio frequency (RF) and local oscillator (LO) paths. The receiver comprises a multi-band reconfigurable RF front-end, double-balanced passive I/Q mixers, an I/Q LO generation network with a tunable I/Q …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698025
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 5-V Input to 0.7–1.8-V Output Always-Constant-Current Hybrid DC–DC Converter With 2.5-mV Output Voltage Ripple and 1.3-μs Settling Time

A 5-V Input to 0.7–1.8-V Output Always-Constant-Current Hybrid DC–DC Converter With 2.5-mV Output Voltage Ripple and 1.3-μs Settling Time 150 150
Author(s): Mingi Jeong, Hyunjin Kim, Taehyeong Park, Chulwoo Kim

Abstract:

This article presents a 5-V input to 0.7–1.8-V output always-constant-current (ACC) hybrid DC–DC converter for high-performance computing (HPC) device applications. The introduced converter has a capacitor current path that compensates the AC component of the inductor current path to maintain the ACC condition. Thus, while reducing the DC inductor …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697784
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Ka-Band Time-Modulated Phase-Invariant Variable-Gain Amplifier With 30-dB Gain Tuning Based on Duty-Cycle Control

A Ka-Band Time-Modulated Phase-Invariant Variable-Gain Amplifier With 30-dB Gain Tuning Based on Duty-Cycle Control 150 150
Author(s): Dongfan Xu, Minzhe Tang, Haiyun Gu, Yuxuan Liu, Yilun Chen, Ziyuan Ren, Minghao Fan, Daxu Zhang, Yi Zhang, Duo Li, Zheng Li, Zezheng Liu, Chun Wang, Yudai Yamazaki, Yuncheng Zhang, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada

Abstract:

This article presents a time-modulated variable-gain amplifier (VGA) employing a clock-sampling topology governed by a duty-cycle control (DCC) loop. By modulating the effective operation time of the amplifier rather than altering its RF bias conditions, for precise tuning of the clock duty cycle, enabling phase consistency at millimeter-wave frequencies. The …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695362
Publisher: IEEE

View on IEEE Xplore

  • No Comments

One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events

One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events 150 150
Author(s): Zihao Tang, Jiacheng Yang, Rui P. Martins, Mo Huang

Abstract:

One-cycle-balance (OCB) response represents the optimal load-transient response for buck converters, maximizing system energy efficiency and robustness. While prior art has demonstrated OCB response for single load-step events, it fails in consecutive transients, which are prevalent in modern applications. This work overcomes these limitations by introducing an OCB controller that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697453
Publisher: IEEE

View on IEEE Xplore

  • No Comments

STAR-SRAM: 16-bit Floating-Point SRAM-Based Digital Computing-in-Memory Macro in a 28 nm

STAR-SRAM: 16-bit Floating-Point SRAM-Based Digital Computing-in-Memory Macro in a 28 nm 150 150
Author(s): Chuan-Tung Lin, Jonghyun Oh, Mingoo Seok

Abstract:

A digital computing-in-memory (DCIM) macro emerges as a promising building block in a deep neural network (DNN) accelerator. To better support DNN workloads, circuit designers aim to improve three main metrics for macros: energy efficiency, compute density, and weight density. Improvements in those metrics directly translate into reduced energy consumption, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3694927
Publisher: IEEE

View on IEEE Xplore

Search this website