IEEE Journal of Solid-State Circuits

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An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET

An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET 150 150
Author(s): Yu-Chun Ding, Chia-Yu Chang, Hui-Yun Tsai, Chun-Yeh Lin, Hao-Jiun Tu, Yu-Ching Su, Kai-Feng Chang, Tsung-Han Hsieh, Wen-Ching Chen, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chao-Tsung Huang

Abstract:

The capability to detect small objects precisely in real time is essential for intelligent systems, particularly in advanced driver assistance systems (ADASs), as it ensures continuous awareness of distant obstacles for enhanced safety. However, achieving high detection precision for small objects requires high-resolution input inference on deep convolutional neural network (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3628249
Publisher: IEEE

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MEGA.mini: An Energy-Efficient NPU Leveraging a Novel Big/Little Core With Hybrid Input Activation for Generative AI Acceleration

MEGA.mini: An Energy-Efficient NPU Leveraging a Novel Big/Little Core With Hybrid Input Activation for Generative AI Acceleration 150 150
Author(s): Donghyeon Han, Anantha P. Chandrakasan

Abstract:

This article presents a processor for the acceleration of generative AI (GenAI) based on a novel heterogeneous core architecture called MEGA.mini. The processor introduces three algorithmic features: 1) fixed-point (FXP) and floating-point (FP) hybrid input activation (IA) representation; 2) a delayed-statistics-based normalization (NORM); and 3) conditional polynomial-based nonlinear activation (NLA) approximation. These …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626894
Publisher: IEEE

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A Multicore Programmable Variable-Precision Near-Memory Accelerator for CNN and Transformer Models

A Multicore Programmable Variable-Precision Near-Memory Accelerator for CNN and Transformer Models 150 150
Author(s): Yiming Yang, Yiyang Yuan, Xinghua Wang, Xiaoran Li, Hao Wu, Qihao Liu, Weiye Tang, Xiangqu Fu, Feng Zhang

Abstract:

Convolutional neural network (CNN) and transformer are the most popular neural network models in computer vision (CV) and natural language processing (NLP). It is quite common to use both these two models in multimodal scenarios, such as text-to-image generation. However, these two models have very different memory mappings, dataflows and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624011
Publisher: IEEE

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A Calibration-Free Pipelined-SAR ADC With Cross-Stage Gain-Mismatch Error Shaping and Inherent Noise Shaping

A Calibration-Free Pipelined-SAR ADC With Cross-Stage Gain-Mismatch Error Shaping and Inherent Noise Shaping 150 150
Author(s): Jihang Gao, Yaohui Luan, Siyuan Ye, Jiajia Cui, Xinhang Xu, Linxiao Shen

Abstract:

This article presents a calibration-free pipelined-successive-approximation-register (SAR) analog-to-digital converter (ADC) based on the proposed cross-stage gain-mismatch-error shaping (CS-GMES) mechanism. The CS-GMES is realized by including the entire 2nd stage into MES operation to unify the gain error and the 2nd-stage mismatch error. A feedback capacitor provides cross-stage connection and mismatch …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624412
Publisher: IEEE

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A 40-nm 209-TOPS/W Reinforcement Learning Processor With Full Speculation Exploitation and Inference-Training Parallel Processing

A 40-nm 209-TOPS/W Reinforcement Learning Processor With Full Speculation Exploitation and Inference-Training Parallel Processing 150 150
Author(s): Shih-Hao Chen, Ping-Sheng Wu, Brian Dean Soon, Chao-Hung Chen, Chih-Wei Liu, Chun-Lung Hsu, Chia-Hsiang Yang

Abstract:

Reinforcement learning (RL) has found widespread applications across diverse domains, making energy-efficient implementations imperative. This article presents an energy-efficient RL processor featuring full speculation exploitation and parallel processing for inference and training. Binary direct feedback alignment (DFA) is applied to perform error propagation in parallel, reducing the computational complexity by 23%. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626988
Publisher: IEEE

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An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants

An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants 150 150
Author(s): Yiwei Zou, Huan-Cheng Liao, Wei Wang, Wonjune Kim, Yumin Su, Jacob T. Robinson, Kaiyuan Yang

Abstract:

Biomedical implants offer transformative tools to improve medical outcomes. To realize minimally invasive implants with miniaturized volume and weight, wireless power transfer (WPT) has been extensively studied to replace bulky batteries that dominate the volume of traditional implants and require surgical replacements. Ultrasonic (US) and magnetoelectric (ME) WPT modalities, which …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3617217
Publisher: IEEE

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AFP-CIM: All-Inclusive Floating-Point With Segmented Compute-in-Memory Macro

AFP-CIM: All-Inclusive Floating-Point With Segmented Compute-in-Memory Macro 150 150
Author(s): Yi Zhan, Wei-Han Yu, Ka-Fai Un, Zongsheng Li, Haoming Chu, Yuxiang Huan, Ning Ma, Li-Rong Zheng, Rui P. Martins, Pui-In Mak

Abstract:

This article reports an all-inclusive floating-point (AFP) with the segmented 8T-static random access memory (SRAM) compute-in-memory (CIM) macro. It features: 1) a segmented read-wordline (SRWL) to efficiently support the AFP formats including the AFP4/6/8/16 with all of the exponent–mantissa ratios (EMRs); 2) a bit-wise accumulation first (BWAF) circuit structure with a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3625995
Publisher: IEEE

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A Hybrid SCVR With 4 × C F Continuously Scalable-Conversion Ratio SC Stage

A Hybrid SCVR With 4 × C F Continuously Scalable-Conversion Ratio SC Stage 150 150
Author(s): Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Fuyao Zhang, Yihan Zhang, Rui P. Martins, Mo Huang

Abstract:

This work presents a hybrid switched-capacitor (SC) voltage regulator (VR) with a continuously scalable-conversion (CSC)-ratio stage implemented with off-chip flying capacitors ( $boldsymbol {C}_{ F}$ s). By eliminating the need for high-density on-chip capacitors, this approach offers broader accessibility to designers. The use of off-chip $boldsymbol {C}_{ F}$ s mandates …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626285
Publisher: IEEE

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A Real-Time Deep Reinforcement Learning Processor for Mapless Autonomous Navigation With Unified Actor-Critic Network and Inference-on-Request Scheduling

A Real-Time Deep Reinforcement Learning Processor for Mapless Autonomous Navigation With Unified Actor-Critic Network and Inference-on-Request Scheduling 150 150
Author(s): Juyoung Oh, Jie-Xin Liu, Yi-Chen Teng, Hsueh-Cheng Wang, Dongsuk Jeon

Abstract:

This article presents a real-time deep reinforcement learning (DRL) processor for mapless autonomous navigation targeting resource- and energy-constrained mobile robots. The unified actor-critic network architecture combined with feature map caching enables parameter sharing and eliminates redundant computations. This approach reduces the total parameter count, external memory access (EMA), and overall …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3627785
Publisher: IEEE

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