IEEE Journal of Solid-State Circuits

A 25.1-TOPS/W Sparsity-Aware Hybrid CNN-GCN Deep Learning SoC for Mobile Augmented Reality

A 25.1-TOPS/W Sparsity-Aware Hybrid CNN-GCN Deep Learning SoC for Mobile Augmented Reality 150 150

Abstract:

Augmented reality (AR) has been applied to various mobile applications. Modern AR algorithms include neural networks, such as convolutional neural networks (CNNs) and graph convolutional networks (GCNs). The high computational complexity of these networks poses challenges for real-time operation on energy-constrained devices. This article presents the first energy-efficient hybrid CNN-GCN …

View on IEEE Xplore

A 125–600-MHz IF 75-dB DR Partially Time-Interleaved Bandpass DSM Based on Passive $N$ -Path Filters

A 125–600-MHz IF 75-dB DR Partially Time-Interleaved Bandpass DSM Based on Passive $N$ -Path Filters 150 150

Abstract:

This work presents a sixth-order partially time-interleaved bandpass delta-sigma modulator (BP DSM) for direct intermediate-frequency (IF) digitization. There are three resonators, and each of them is built with a passive $N$ -path filter; while two open-loop operational transconductance amplifiers (OTAs) are inserted in between to realize the loop filter. The …

View on IEEE Xplore

A 16-MHz Crystal Oscillator With 17.5- $\mu$ s Start-Up Time Under 10 $^{4}$ -ppm- $\Delta $ F Injection Using Automatic Phase-Error Correction

A 16-MHz Crystal Oscillator With 17.5- $\mu$ s Start-Up Time Under 10 $^{4}$ -ppm- $\Delta $ F Injection Using Automatic Phase-Error Correction 150 150

Abstract:

Ast start-up crystal oscillators (XOs) based on energy injection with an auxiliary oscillator (AO) are efficacious in improving the energy consumption of duty-cycled the Internet of Things (IoT) devices. Nonetheless, the frequency mismatch ( $Delta$ F) between the injection frequency and the crystal’s resonance frequency restrains the injection efficiency and …

View on IEEE Xplore

A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta–Sigma Modulator With Digital Noise Coupling

A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta–Sigma Modulator With Digital Noise Coupling 150 150

Abstract:

This article introduces a high-resolution continuous-time delta–sigma modulator (CT DSM) architecture that incorporates a successive approximation register (SAR)-assisted digital noise coupling (DNC) technique and a multi-stage noise-shaping (MASH) structure. The limited maximum stable amplitude (MSA) problem due to the high-order-shaped large quantization error ( $Etextsubscript{1}$ ) in the previous …

View on IEEE Xplore

K/Ka-Band Hybrid-Packaged Four-Element Four-Beam Phased-Array Transmitter and Receiver Front-Ends With Optimized Beamforming Passive Networks

K/Ka-Band Hybrid-Packaged Four-Element Four-Beam Phased-Array Transmitter and Receiver Front-Ends With Optimized Beamforming Passive Networks 150 150

Abstract:

This article presents K/Ka-band four-element four-beam phased-array transmitter (TX) and receiver (RX) front-ends. Hybrid-packaged technology is employed, consisting of one TX/RX 65-nm CMOS beamformer and four 0.1- $mu$ m GaAs power amplifiers (PAs)/low-noise amplifiers (LNAs). Each beam maintains a full connection to every antenna element without degrading …

View on IEEE Xplore

A 28-nm Energy-Efficient Sparse Neural Network Processor for Point Cloud Applications Using Block-Wise Online Neighbor Searching

A 28-nm Energy-Efficient Sparse Neural Network Processor for Point Cloud Applications Using Block-Wise Online Neighbor Searching 150 150

Abstract:

Voxel-based point cloud networks composed of multiple kinds of sparse convolutions (SCONVs) play an essential role in emerging applications such as autonomous driving and visual navigation. Many researchers have proposed sparse processors for image applications. However, they cannot properly deal with three problems in the point cloud, including low efficiency …

View on IEEE Xplore

Full-Duplex Receiver With Wideband, High-Power RF Self-Interference Cancellation Based on Capacitor Stacking in Switched-Capacitor Delay Lines

Full-Duplex Receiver With Wideband, High-Power RF Self-Interference Cancellation Based on Capacitor Stacking in Switched-Capacitor Delay Lines 150 150

Abstract:

The self-interference (SI) channels in full-duplex (FD) radios have large nano-second-scale delay spreads, which poses a significant challenge in designing SI cancelers that can emulate the SI channel over wide bandwidths. Passive implementations of high delay lines have a prohibitively large form factor and loss when implemented on silicon, whereas …

View on IEEE Xplore

Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro

Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro 150 150

Abstract:

This article presents a comprehensive assessment of the impact of various design assist techniques on the inherent performance and reliability of native resistive RAM (RRAM) on silicon. The collaborative optimization of design and technology plays a crucial role in replacing conventional flash memory as the leading solution. We showcase that …

View on IEEE Xplore

New Associate Editor

New Associate Editor 150 150

Abstract:

It is with great pleasure that I welcome Prof. Q. Jane Gu to the Editorial Board of the IEEE Journal Of Solid-State Circuits as a new Associate Editor. Prof. Gu is an expert in high-speed integrated circuits and systems, particularly mm-wave, sub-mm-wave, and THz circuits.

View on IEEE Xplore