Enter Now! 2019-2020 SSCS Student Contests
Circuit Design Problem: Solve a thought-provoking circuit analysis and design problem. Up to three contestants with the best answers will receive US $2K each towards attending an SSCS-sponsored conference (ISSCC, CICC, ESSCIRC, VLSI Symp., or A-SSCC). Submitters must follow all contest guidelines, rules, and regulations to be eligible. Click here to access the contest. Deadline: January 15, 2020 - EXTENDED DEADLINE.
International Student Circuits Video Contest: Create a fun short video that explains circuits to high-school students. Up to three contestants will receive US $2K each towards attending an SSCS-sponsored conference (ISSCC, CICC, ESSCIRC, VLSI Symp., or A-SSCC). Submitters must follow all contest guidelines, rules, and regulations to be eligible. Click here for rules, regulations, and submission guidelines. Deadline: December 15th, 2019
Student Hoodie Design Contest: Design a hoodie that illustrates how integrated circuits power the artificial intelligence era. How do solid-state circuits play a role in the era of artificial intelligence? One grand prize winner will be awarded $500.00 cash prize and reimbursement to a 2020 SSCS conference. Two finalists will receive reimbursement to a 2020 SSCS conference. Submitters must follow all contest guidelines, rules, and regulations to be eligible. Click here for rules, regulations, and submission guidelines. Deadline: November 14th, 2019.
New Member Benefit - SSCS YouTube Channel
The IEEE Solid-State Circuits Society has launched a YouTube channel. The channel includes all CONFedu videos including VLSIx 2016, CICCx 2017, ISSCCedu 2018, ESSCIRCedu 2018, and CICCedu 2019. Coming Soon: VLSIedu 2019.
Click here to view the channel and be sure to subscribe to stay up-to-date on new content!
Upcoming SSCS Webinar in November
The IEEE Solid-State Circuits Society continues its 2019 webinar series with an upcoming webinar in November.
On November 22, 2019, at 12:00 PM ET (New York), Prof. Ali Sheikholeslami, University of Toronto, Canada, will present a webinar entitled "Basics of Jitter in Wireline Communications". Jitter refers to deviation from ideal timing in clock and data transitions. In wireline communications, jitter reduces the timing margin available for clock and data recovery (CDR) circuits and poses significant challenges to signal integrity as the data rates march towards 100Gb/s/lane and beyond. In this talk, we first review the basic definitions of jitter and its properties, the relationship between jitter and phase noise, and the effects of jitter on CDR and other building blocks of a wireline system. We then describe the concept of jitter transfer, jitter generation, and jitter tolerance curves, and the methods of characterizing, modeling, and simulating jitter. Finally, we present some recent works on jitter measurement and jitter mitigation techniques that are used to optimize the link performance.
Attendees of SSCS webinars have the opportunity to earn Continuing Education Units.
Did you miss a past SSCS webinar? All SSCS webinars can be viewed online on the SSCS Resource Center.