2022 SSCS Members-at-Large Election Process

The role of a MAL is to understand the society’s strategic plan, and consider and vote on motions aimed at supporting our strategy through new or modified programs and services. MALs, along with other AdCom members, are responsible for providing financial oversight, ensuring adequate resources for SSCS to fulfill its mission, ensuring legal and ethical integrity, effective organizational planning, recruiting and orienting new AdCom members, and enhancing SSCS’s public standing through involvement in the society’s various committees.

Petition Process for AdCom Candidacy

If a Society Member was not on the announced slate, they can petition to be on the slate. 

Society members who are interested in nominating a colleague(s), or themselves, by petition should notify the SSCS Executive Office by email (sscs-elections@ieee.org) no later than August 1 of a given year, and include a statement verifying the nominee's agreement to be a candidate. Once a petitioner's eligibility is verified, he/she may be posted to the petition site until  September 1, when the petition process closes. 

Any voting member of the Society may sign such petitions in either one of two ways:

1) via a link to the petition site provided on a webpage or

2) with an original signature on a hard copy petition.

Hard copy petitions must be received by the SSCS Executive office by 31 August to be entered into the IEEE petition system.

There is no official IEEE hard copy petition form for society elections. Each handwritten petition form must include:

• the name of the candidate
• the title of the position the candidate is running for

For each person signing the petition:

• name (printed)
• IEEE member number
• signature

If all the signatures on the petition are valid  -- .e., active members with their dues paid -- the petition candidate's name, biography, and photo will appear online and on the printed ballot.

 A petition candidate needs approximately 300 signatures of SSCS members in good standing -- or about 2%  of the membership --  to qualify for the slate, as defined by IEEE Bylaw I-308.16 as of 31 December, 2011. Signatures are verified during the petition process (additional signatures above the minimum are recommended as a safety factor).

2023-2025 Member-at-Large Slate

 U-Fat Chio (Alpha) (S’07–M’12) received the B.Sc. degree in Electrical Engineering and M.Sc. degree in Communications Engineering from National Sun Yat-Sen University, Kaohsiung, Taiwan, in 2002 and 2004, respectively, and the Ph.D. degree from the University of Macau, Macao, China, in 2012. From 2004 to 2005, he was with DenMOS Technology Inc., Hsinchu, Taiwan. From 2012 to 2017, He was a Postdoctoral Fellow with the State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau. In 2018, He joined Chongqing University of Posts and Telecommunications, Chongqing, China. He is currently an Associated Professor. His research interests include the circuit designs in the biomedical instrumentation, power management ICs and analog-to-digital converters. Dr. Chio is the founding Chair of IEEE EMB Society Chongqing Chapter. He is the founding Secretary of IEEE CAS Society Chongqing Chapter, and also is the founding Secretary of IEEE SSC Society Chongqing Chapter.

Jung-Hwan Choi received the B.S. degree from Kyungpook National University, Daegu, South Korea, in 1990, and the M.S. and Ph.D. degrees from the Korea Advanced Institute of Science and Technology, Daejeon, South Korea, in 1992 and 1997, respectively, all in electrical engineering. In 1997, he joined DRAM design team of Samsung Electronics, Hwaseong, South Korea, where he is involved in the design of Rambus, XDR DRAM, and high-speed I/O interface for memory application. He is a Fellow in Samsung, where he is responsible for the development of high-speed DRAMand Flash NAND interfaces for the next generation, including LPDDRx, DDRx. GDDRx and Toggle 6/7. He is also involved in the next generation PCIe GenX and MPHY development. His current research interests include the design of monolithic microwave IC, high-speed memory, high-frequency measurement, and SI/PI.

Fa Foster Dai (M’92–SM’00-F’09) received a Ph.D. degree in electrical and computer engineering from Auburn University, AL, USA in 1997 and a Ph.D. degree in electrical engineering from The Pennsylvania State University, PA, USA in 1998. From 1997 to 2000, he was a Member of Technical Staff in very large-scale integration (VLSI) at Hughes Network Systems, Germantown, Maryland, USA. From 2000 to 2001, he was a Technical Manager/Principal Engineer in RFIC at YAFO Networks, Hanover, Maryland, USA. From 2001 to 2002, he was a Senior RFIC engineer at Cognio Inc., Gaithersburg, Maryland, USA. In August 2002, he joined Auburn University in Auburn, Alabama, USA, where he is currently the Godbold Endowed Chair Professor in electrical and computer engineering. His research interests include analog, mixed-signal and RF circuit designs, and ICs for communication system blocks such as frequency synthesizers, and data-converters. He co-authored eight books and book chapters including Integrated Circuit Design for High-Speed Frequency Synthesis (Artech House Publishers, Feb. 2006) and Low-Noise Low-Power Design for Phase-Locked Loops-Multi-Phase High-Performance Oscillators (Springer International Publishing AG, Nov. 2014).

Dr. Dai has served as the Guest Editor for IEEE Journal on Solid State Circuits in 2012 and 2013 and the Guest Editor for IEEE Transactions on Industrial Electronics in 2001, 2009 and 2010. He has served on the technical program committees (TPC) of the IEEE Symposium on VLSI Circuits from 2005 to 2008. He currently serves on the steering committee of IEEE Custom Integrated Circuits Conference (CICC) and the TPC of IEEE Radio Frequency Integrated Circuits Symposium (RFIC). He was the 2016 TPC Chair and the 2017 General Chair of IEEE Bipolar / BiCMOS Circuits and Technology Meeting (BCTM). He has served as the 2019 TPC chair, the 2020 conference chair, and the 2021 general chair for IEEE Custom Integrated Circuits Conference.

Dr. Dai received the Senior Faculty Research Award for Excellence from Auburn University in 2009 and was awarded the Distinguished Graduate Faculty Lectureship from Auburn University in 2021. He holds 17 U.S. patents and was named the Fellow of National Academy of Inventors in 2021. He was elected IEEE Fellow in 2009 “for contributions to high-speed frequency synthesis and radio frequency integrated circuits”.

Jun Deguchi received the B.E. and M.E. degrees in machine intelligence and systems engineering and  the Ph.D. degree in bioengineering and robotics from Tohoku University, Sendai, Japan, in 2001, 2003,  and 2006, respectively. In 2004, he was a Visiting Scholar at the University of California, Santa Cruz,  CA, USA. In 2006, he joined Toshiba Corporation, and was involved in design of analog/RF circuits  for wireless communications, CMOS image sensors, high-speed I/O, and accelerators for deep  learning. From 2014 to 2015, he was a Visiting Scientist at the MIT Media Lab, Cambridge, MA, USA,  and was involved in research on brain/neuro science. In 2017, he moved to Kioxia Corporation  (formerly Toshiba Memory Corporation), and has been a research lead of an advanced circuit design  team working on high-speed I/O, deep learning/neuromorphic accelerators. Dr. Deguchi has served as  a member of the international technical program committee (TPC) of IEEE International Solid-State  Circuits Conference (ISSCC) since 2016, and IEEE Asian Solid-State Circuits Conference (A-SSCC)  since 2017. He has also served as a TPC vice-chair of IEEE A-SSCC 2019, a Far-East (FE) secretary  for IEEE ISSCC 2021, a FE vice-chair for IEEE ISSCC 2022. He will serve as a FE chair for IEEE  ISSCC 2023. He has also been a review committee member of IEEE International Conference on  Artificial Intelligence Circuits and Systems (AICAS) 2020.

Zeynep Toprak Deniz received her B.S. degree from Istanbul Technical University, Istanbul, Turkey; her M.S. degree from Sabanci University, Istanbul, Turkey; and her Ph.D. degree from the Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland  in 1999, 2001 and 2006 respectively, all in Electrical Engineering.

From 1999 to 2003, she worked at ST Microelectronics in analog mixed-signal circuit design. In January 2003, she joined EPFL as a graduate student, working in the Microelectronic Systems Laboratory as a Research Assistant. She designed and demonstrated a unique analog computation system for global energy management and optimization in Network-on-Chip applications in her doctoral work.

In 2007 she joined the IBM T. J. Watson Research Center, Yorktown Heights, NY, as a Research Staff Member. Her research interests include the design of mixed-signal CMOS circuits for high-speed data communications, power-efficient and high-speed analog-to-digital converters, and voltage regulators. She has been a member of IEEE since 1999, and she has published more than 30 papers in IEEE journals or conferences. She has written a book chapter titled “Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation,” which was published by Springer as a part of the book “VLSI-SoC: Research Trends in VLSI and Systems on Chip.” Zeynep holds fifteen issued U.S. patents. She has been involved with the STEM outreach for the past fifteen years co-organizing Girls Go TechKnow Camps yearly at IBM Research for girls going into 7th and 8th grade, which has now expanded to include a second camp for boys. The idea behind the camps is to get girls and boys interested in high-tech careers as scientists, researchers, and engineers. She is a Women in Circuits Committee member and is actively involved in mentoring initiatives to increase diversity and representation.

Alicia Klinefelter received her B.S. degree in electrical and computer engineering from Miami University, Oxford, OH in 2010 and her Ph.D. in Electrical Engineering from the University of Virginia, Charlottesville, VA, in 2015. She has authored and co-authored publications in the areas of ultra-low power circuits, biomedical SoC design, and high-level synthesis methodologies. Since 2017 she has worked at NVIDIA, Inc., in Durham, NC, where she is an ASIC design engineer for GPU interconnects and was previously a Senior Research Scientist in the ASIC & VLSI research group. Prior to working at NVIDIA, she worked in Intel’s Digital Communications Lab in Hillsboro, OR. She is currently a member of SSCS (M’14), IEEE, and she served on the technical program committee for ISSCC from 2018-2022.

Prof. Valencia Joyner Koomson is an Associate Professor in the Department of Electrical and Computer Engineering and the Tisch College of Civic Life at Tufts University. She completed the B.S. and M.Eng. degrees in electrical engineering and computer science at the Massachusetts Institute of Technology in 1998 and 1999, respectively. She was awarded the George C. Marshall scholarship in 1999 to pursue post-graduate studies at the University of Cambridge.  She received the M.Phil. and Ph.D. degrees in electrical engineering in 2000 and 2003, respectively, from the University of Cambridge.   She is currently holding an appointment as a Dr. Martin Luther King Jr. Visiting Professor at MIT in the Department of Electrical Engineering and Computer Science.

Prof. Koomson’s research lies at the intersection of biology, medicine, and electrical engineering.  Her interests are in micro-/nano-scale electronic circuits and systems for wearable and point-of-care biomedical devices, health informatics, and advanced microfluidic systems to probe intercellular communication.  Prof. Koomson’s research funding sponsors include the National Institutes of Health, National Science Foundation, DARPA, Catalyst Foundation, and W.M. Keck Foundation.  She has authored over 50 research and review publications in various high impact peer-review journals and several book chapters.  She holds a patent for a system and method for measuring phase delay and amplitude of an optical signal in animal tissue. 

In 2005, she held an Adjunct Professor appointment at Howard University.  She was a Visiting Professor at Rensselaer Polytechnic Institute and Boston University in 2008 and 2013, respectively. Prior to joining Tufts, she held an appointment as a VLSI Research Engineer at the University of Southern California’s Information Sciences Institute (USC/ISI), where she performed research on the design of radiation-hardened analog/mixed signal VLSI systems in CMOS for military and space applications.

Prof. Koomson is a George C. Marshall Scholar, Intel Foundation Scholar, National Science Foundation Graduate Research Fellow, and 2010 recipient of the NSF Faculty Early Career Development (CAREER) Award. She is a member of several professional societies, technical program committees, and editorial boards for high impact journals.  

Chris Mangelsdorf (S'77 - M'84) received a B.S. in physics, magna cum laude, from Davidson College, Davidson, NC in 1977. In 1980 and 1984, he received the M.S. and Ph.D. degrees in electrical engineering at M.I.T. where he held the first Analog Devices Fellowship. He has been associated with Analog Devices since summer employment in 1980 and has been a Fellow of Analog Devices since 1998.

From 1996 to 2013, Dr. Mangelsdorf worked in Tokyo, running the Analog Devices Tokyo Design Center and then adding responsibility for the Shanghai and Beijing Design Centers with the title of Asia Technical Director. In 2013, he moved to the Analog Devices San Diego office, where he was engaged in the development of high speed A/D converters. As of September 2020, Chris has retired from Analog Devices to pursue a career in fashion modelling.

Dr. Mangelsdorf is a member of Phi Beta Kappa and Sigma Pi Sigma (physics) and has served on both the ISSCC Program Committee and the AdComm for the IEEE Solid-State Circuits Society. He holds 18 patents and has won the ISSCC Best Evening Session Award 10 times.

Dr. Ramin K. Poorfard received his Ph.D. from University of Toronto in 1995. Upon graduation, he joined Bell Labs in March of 1995 where he was involved in the GSM base-band product development for cellular phones. He received several promotions while working at Bell Labs, the last of which was in 1999 when he was promoted to the rank of Distinguished Member of Technical Staff. In July of 2000, he joined Silicon Laboratories Inc. as a design engineer in Austin, TX where he worked on ADSL and ADSL2+ products and later on Satellite TV receiver front ends. Starting in 2007, he architected and spear-headed the RF and Baseband design effort regarding the terrestrial TV tuner project. The project enjoyed wide acceptance in the industry (>80% market share) and significant commercial success (more than 1 Billion units sold by October 2018). He was later on promoted to the rank of Sr. Director of Engineering, where he was in charge of managing the design aspects and IC roadmap of the video line of products. As of Feb. 2016, Ramin has assumed the role of the Vice President of Technology in the office of CTO where he oversees the roadmap and technical outlook for the Silicon labs next generation of wireless MCU’s for IoT applications. His technical interests are RF IC architectures and their building block integrations as well as mixed-signal modelling and design.

Prof. (Dr) V.R.Singh, Ph.D. (Electrical Engg), IIT-Delhi and Life Fellow- IEEE and LF-IETE, LF-IEI, LF-ASI/USI and LF-IFUMB/WFUMB, has over 38 years of research-cum-teaching experience in India and abroad (Univ of Toronto-Canada, KU Leuven- Belgium, Korea Univ, South Korea, TU-Delft, Netherlands, Univ of Surrey/Southampton, UK, PTB-Germany and others). He has been at National Physical Laboratory (NPL), New Delhi, as a Director-grade-Scientist/ Head of Instrumentation, Sensors & Biomedical Measurements and Standards, as well as a Distinguished Professor (AICTE/INAE) jointly with Thapar University.

He has over 350 papers, 250 talks, 260 conf papers, 4 books, 14 patents and 30 consultancies to his credit. Under his guidance, 35 PhD scholars have earned PhD degree while others are working with him. He is the Advisor to the PDM University. 

Dr. Singh has been the Associate Editor of IEEE Int Sensor Journal (2010-2016), and is Associate Editor of IEEE Transactions on Instrumentation and  Measurements (TIM) as well as IEEE TIM Open Journal,, Editorial Board Member, Biomedical Engineering Letters (BMEL) and Regional Editor of Int Journal of Biomedical Engineering and Technology (IJBET). Apart from this, he is on Editorial/Reviwer Boards of other journals. like Sensors & Actuators (Switzerland), IEEE Trans on Engg in Med and Biology, J Computers in Electrical Engg (USA), J.Instn Electr Telecom Engrs,  J.Instn Engrs -India, Ind J Pure & Appl Physics,  J.of Instrm Soc Ind, J. Pure & Appl Ultrasonics, J. Life Science Engg, etc. 

He is the recipient of awards by INSA (Ind Natnl Sci Academy)1974, NPL 1973,  Thapar Trust 1983,  ICMR (Ind Council of Med Res) 1984; Japan Soc.  Ultr in Medicine 1985, Asian Federation of Societies of Ultasound in Medicine  & Biology 1987, IE-I(Institution of Engineers- India) 1988/ 1991, IEEEEMBS 1999 and IEEE-2010/2011/2014, Sir CV Raman Award by Acoustical Society of India / 2018, for his outstanding contributions, and Best AE Award-2020 of IEEE TIM.. He has served as  IEEE-EMBS-DL (Distinguished Lecturer)-2018-2020, IEEE NanoTechnology Council-DL (2019-2021), IEEE–Systems Council-DL (2020-2022).  and INSA-YSA-DL 2019-todate). 

Dr VR Singh has served as Expert (2019-2020) on the IET (Engineering and Technology) A F HARVEY SEARCH AND SELECTION PANEL for  Research Award in Medical Engineering and Technology, for the year 2020. This is the most prestigious academic honour. The IET has hosted this award at Michael Faraday House, Hertfordshire, UK.

He has served as Guest Editor of Special Issues of JASI on Physical Acoustics and Ultrasonics (2016-17) and Medical Acoustics (2017-18) as well as on IETE Technical Review journal on Transducers (2002).

Dr Singh  is the Chair of IEEE-EMBS/IMS-Delhi Chapter, Immediate past President of Acoustical Society of India  and current Vice President of Ultrasonic Society of India and has been theVice President of Instrumentation Soc of India, Vice-President of IFSUMB, Secretary of IEEE India Council and the Chairman of IEEE-Delhi Section. Dr. Singh is a Member of IEEE Standards Association. He was also Council Member of WFUMB (Australia) Ultrasound Safety and Standards. He has been the Member of  BIS Committee on Elctro-Medical Committee and presently, he is the Chairman of BIS-MHD-15 Committee. Dr Singh has been the session chair, plenary/keynote/ invited speaker and on advisory boards of world congresses and national/international conferences, world over. He has been the Conf Organiser of WESPAC-2018, Nov 10 to 15, New Delhi, as well as other mega events.

His main areas of interest are: nano-electronic devices, sensors and transducers, biomedical instrumentation, biomedical standards, computer modelling and simulation, biomedical ultrasonics/medical acoustics, POCT devices, neuro-sensors/implants, nano-cancer-technology, cancer hyperthermia, tissue characterisation, lithotripsy, IOT, AI, WSN and u-health care engineering.

Makoto Takamiya received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Tokyo, Japan, in 1995, 1997, and 2000, respectively. In 2000, he joined NEC Corporation, Japan, where he was engaged in the circuit design of high speed digital LSI's. He joined University of Tokyo, Japan in 2005, where he is now a Professor of Institute of Industrial Science. From 2013 to 2014, he stayed at University of California, Berkeley as a visiting scholar. His research interests include the digital gate driver and sensor ICs for power electronics and the integrated power management circuits for automotive and industrial applications. He is a member of the technical program committee of IEEE Symposium on VLSI Circuits and IEEE Asian Solid-State Circuits Conference. He formerly served on the technical program committees of IEEE International Solid-State Circuits Conference (ISSCC) from 2015 to 2020 and IEEE Custom Integrated Circuits Conference from 2006 to 2011. He was a Far East Regional Chair in ISSCC 2020. He was a Distinguished Lecturer of IEEE Solid-State Circuits Society from 2019 to 2020. He received 2009 and 2010 IEEE Paul Rappaport Awards and the best paper award in 2013 IEEE Wireless Power Transfer Conference.

Carlos Tokunaga (IEEE S’98–M’08–SM’17) leads the Reliable and Resilient Circuit Technology Group at Intel’s Circuit Research Lab in Hillsboro, Oregon, where he is a Principal Engineer. He leads pioneering research on circuit reliability, resiliency and security techniques in advanced technologies, developing foundational IP for transfer into volume production. He has published more than 50 technical papers in refereed conferences and journals and has received 15 patents. Carlos earned a B.S. (magna cum laude) in electronics engineering from the University of Los Andes, Bogotá, Colombia, in 2001 and the M.S. and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, in 2005 and 2008 respectively. He has been an IEEE volunteer since 1998. Notably, from 1998-2000, Carlos was the IEEE Student Branch Chair at the University of Los Andes. In 2000-2003 as a member of the Los Andes Microelectronics Center (CMUA), he helped organize workshops and courses for IEEE CAS and CYTED to advance education and the electronics industry within Latin America. Since 2019, Carlos has been serving on the Technical Program Committees (TPC) of both the VLSI Symposium and Custom Integrated Circuits Conference (CICC). As part of the VLSI Symposium, he has been serving as the Demo Chair since 2021 and was also a member of the Best Student Paper Award Committee. Carlos is currently the Sponsorship chair in CICC, having also served as the Digital Circuits Subcommittee Chair and Best Paper Award Committee Co-Chair. Carlos also served in the ISLPED and HOST TPCs.