Publications
SSCS proudly sponsors six top-notch publications as complimentary member benefits in print and electronic formats. The IEEE Journal of Solid-State Circuits (JSSC) - historically one of the top-five downloaded technical journals on IEEE Xplore - is available on-line and in print. The electronic-only Solid-State Circuits Letters (SSC-L) is a brief format companion to the JSSC that offers fast turnaround to authors for the latest innovations in our field. The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) - an open-access monthly accessible free of charge via IEEE Xplore - offers researchers a journal to publish and extend their research results with supplementary technical materials. Our newest open-access journal, IEEE Open Journal of Solid-State Circuits launches in Fall 2020.
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John Long Vice President of Publications |
Members also receive the IEEE Solid-State Circuits Magazine free of charge (in print and on-line), which is a tutorial-level quarterly featuring pioneering breakthroughs, trending topics, and “who’s who” reports about IC community leaders and international, regional, and local award recipients. Other electronic-only publications are the RFIC Virtual Journal, a one-stop, curated compilation of RFIC papers within the publications library of the IEEE, and IEEE Design & Test Magazine, which offers insight into models, methods and tools for microelectronic systems.
- IEEE JOURNAL OF SOLID-STATE CIRCUITS
- Introduction to the Special Section on the 2019 Asian Solid-State Circuits Conference (A-SSCC)
- A VHF Wide-Input Range CMOS Passive Rectifier With Active Bias Tuning
- Stacking Isolated SC Cores for High-Voltage Wide Input Range Monolithic DCDC Conversion
- Analysis and Design of an Audio Continuous-Time 1-X FIR-MASH DeltaSigma Modulator
- A Single-Supply CDAC-Based Buffer-Embedding SAR ADC With Skip-Reset Scheme Having Inherent Chopping Capability
- Processor EnergyPerformance Range Extension Beyond Voltage Scaling via Drop-In Methodologies
- A Smart Hardware Security Engine Combining Entropy Sources of ECG, HRV, and SRAM PUF for Authentication and Secret Key Generation
- An Energy-Efficient Deep Convolutional Neural Network Training Accelerator for
In Situ Personalization on Smart Devices - A 390-GHz Outphasing Transmitter in 28-nm CMOS
- A 20-GHz 1.9-mW LNA Using
g m-Boost and Current-Reuse Techniques in 65-nm CMOS for Satellite Communications - A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth
- A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator
- Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices
- A 12.3-W 0.72-mm Fully Integrated Front-End IC for Arterial Pulse Waveform and ExG Recording
- A 15-Channel Orthogonal Code Chopping Instrumentation Amplifier for Area-Efficient, Low-Mismatch Bio-Signal Acquisition
- Wireless Body-Area-Network Transceiver and Low-Power Receiver With High Application Expandability
- A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors
- Privacy Protection NAND Flash System With Flexible Data-Lifetime Control by In-3-D Vertical Cell Processing
- A 77-dB-DR 0.65-mW 20-MHz 5th-Order Coupled Source Followers Based Low-Pass Filter
- IEEE Journal on Exploratory Solid-State Computational Devices and Circuits publication information
- Special Topic on Exploratory Devices and Circuits for Compute-in-Memory
- Energy-Efficient Moderate Precision Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Arrays
- Accurate Inference With Inaccurate RRAM Devices: A Joint Algorithm-Design Solution
- A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
- A Relaxed Quantization Training Method for Hardware Limitations of Resistive Random Access Memory (ReRAM)-Based Computing-in-Memory
- Memristor-Based Analog Recursive Computation Circuit for Linear Programming Optimization
- Short-Term Long-Term Compute-in-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation
- Analyzing the Effects of Interconnect Parasitics in the STT CRAM In-Memory Computational Platform
- A DNA Read Alignment Accelerator Based on Computational RAM
- A Spiking Recurrent Neural Network With Phase-Change Memory Neurons and Synapses for the Accelerated Solution of Constraint Satisfaction Problems
- aCortex: An Energy-Efficient Multipurpose Mixed-Signal Inference Accelerator
- IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
See more issues of IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
- Staff List
- [Contributors]
- Welcome to the Summer 2020 Issue of IEEE Solid-State Circuits Magazine! [Editor's Note]
- Society updates: working remotely, mentoring, and virtual conferences [president's message]
- Standing on Shoulders [Associate Editor's View]
- The z-Transform for Analog Designers [The Analog Mind]
- Power Supply Noise [Circuit Intuitions]
- Time-Encoding Analog-to-Digital Converters: Bridging the Analog Gap to Advanced Digital CMOS?Part 2: Architectures and Circuits
- How to Evaluate Deep Neural Network Processors: TOPS/W (Alone) Considered Harmful
- Analog Building Blocks of dc-dc Converters: Examining Fundamental Concepts
- SSCS Beijing Chapter Organizes Three Virtual Distinguished Lecture Seminars [Chapters]
- Distinguished Lecturer Bernhard Wicht Gives Online Talk to Israel Chapter [Chapters]
- IEEE SSCS Montreal Chapter Hosts Lecture [Chapters]
- IEEE SSCS and tiny ML Hold First Young Professionals Webinar [Chapters]
- IEEE SSCS Oregon Chapter Remembers Dr. Barrie Gilbert, Recognizes Award Winners [Chapters]
- IEEE SSCS Romania Chapter Promotes Engineering Through Technical Talk [Chapters]
- IEEE SSCS Switzerland Chapter Hosts Webinar by Dr. Alberto Valdes-Garcia [Chapters]
- VLSI 2020 Highlights: A Virtual Version in Response to COVID-19 [Conference Reports]
- Highlights of CICC 2020: The First SSCS Virtual Conference [Conference Reports]
- IEEE SSCS Offers Awards to Recognize and Distinguish Members [Society News]
Aims & Scope - This new electronic publication provides relevant references pertaining to RFIC technology, paired with value-added editorial commentary from technology experts. The RFIC Virtual Journal aims to be the leading focal point on radio frequency integrated circuits from a worldwide perspective by collecting and disseminating knowledge on theory; enabling technologies, design methodologies, fabrication, testing of radio frequency integrated circuits, and systems; and determining which process signals to be transmitted or received through wireless communication.
To access this journal content have your IEEE Xplore login information ready and click here.
- A 0.58-to-0.9-V Input 0.53-V Output 2.4-
$mu$ - A Cryogenic CMOS Parametric Amplifier
- A 117-dB In-Band CMRR 98.5-dB SNR Capacitance-to-Digital Converter for Sub-nm Displacement Sensing With an Electrically Floating Target
- A 2.6 TOPS/W 16-Bit Fixed-Point Convolutional Neural Network Learning Processor in 65-nm CMOS
- A 1-V 8.1-
$mu$ - Novel Pulse-Based Analog Divider With Digital Output