Publications
SSCS proudly sponsors six top-notch publications as complimentary member benefits in print and electronic formats. The IEEE Journal of Solid-State Circuits (JSSC) - historically one of the top-five downloaded technical journals on IEEE Xplore - is available on-line and in print. The electronic-only Solid-State Circuits Letters (SSC-L) is a brief format companion to the JSSC that offers fast turnaround to authors for the latest innovations in our field. The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) - an open-access monthly accessible free of charge via IEEE Xplore - offers researchers a journal to publish and extend their research results with supplementary technical materials. Our newest open-access journal, IEEE Open Journal of Solid-State Circuits launches in Fall 2020.
|
Shanthi Pavan Vice President of Publications |
Members also receive the IEEE Solid-State Circuits Magazine free of charge (in print and on-line), which is a tutorial-level quarterly featuring pioneering breakthroughs, trending topics, and “who’s who” reports about IC community leaders and international, regional, and local award recipients. Other electronic-only publications are the RFIC Virtual Journal, a one-stop, curated compilation of RFIC papers within the publications library of the IEEE, and IEEE Design & Test Magazine, which offers insight into models, methods and tools for microelectronic systems.
- IEEE JOURNAL OF SOLID-STATE CIRCUITS
- A 28-GHz Beam-Space MIMO RX With Spatial Filtering and Frequency-Division Multiplexing-Based Single-Wire IF Interface
- A Broadband Linear Ultra-Compact mm-Wave Power Amplifier With Distributed-Balun Output Network: Analysis and Design
- A 59-to-276-GHz CMOS Signal Generator Using Varactor-Less VCO and Dual-Mode ILFD
- A 2 Time-Interleaved 28-GS/s 8-Bit 0.03-mm2 Switched-Capacitor DAC in 16-nm FinFET CMOS
- An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch
- A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion
- A Time-Interleaved 2nd-Order Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation
- A 10-MHz Current-Mode AOT Boost Converter With Dual-Ramp Modulation Scheme and Translinear Loop-Based Current Sensor for WiFi IoT Applications
- A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning
- Direct 12V/24V-to-1V Tri-State Double Step-Down Power Converter With Online
V CF Rebalancing andIn-Situ Precharge Rate Regulation - Energy Efficient Startup of Crystal Oscillators Using Stepwise Charging
- A CMOS 21 952-Pixel Multi-Modal Cell-Based Biosensor With Four-Point Impedance Sensing for Holistic Cellular Characterization
- Redundant Crossfire: A Technique to Achieve Super-Resolution in Neurostimulator Design by Exploiting Transistor Mismatch
- Extracellular Recording of Entire Neural Networks Using a Dual-Mode Microelectrode Array With 19 584 Electrodes and High SNR
- A High-Voltage Compliance, 32-Channel Digitally Interfaced Neuromodulation System on Chip
- High-Voltage CMOS Active Pixel Sensor
- A 51-pJ/Pixel 33.7-dB PSNR 4 Compressive CMOS Image Sensor With Column-Parallel Single-Shot Compressive Sensing
- A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel
- A PVT Variation-Robust All-Digital Injection-Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division Dual Calibration
- Staff list
- [Contributors]
- Welcome To The Spring 2021 Issue Of IEEE Solid-State Circuits Magazine
- Updates on Society Activities [President's Corner]
- The Design Of Broadband I/O Circuits [The Analog Mind]
- Looking Into Two Nodes [Circuit Intuitions]
- Oscillation and Ringing: Finding Worst-Case Capacitive Load [Shop Talk: What You Didn't Learn in School]
- Cryogenic Low-Noise Amplifiers: Noise Performance and Power Dissipation
- Cryogenic Electronics Development for High-Energy Physics: An Overview of Design Considerations, Benefits, and Unique Challenges
- Cryo-CMOS for Quantum System On-Chip Integration: Quantum Computing as the Development Driver
- Cryo-CMOS Electronics For Quantum Computing: Bringing Classical Electronics Closer To Qubits In Space And Temperature
- A Teacher for All Seasons: How Behzad Razavi has Educated the Microelectronics Community
- IEEE EDS/SSCS Joint Chapter, Croatia Section, Hosts SSCS Distinguished Lecturer Prof. Makoto Nagata [Chapters]
- IEEE CASS/EDS/SSCS Wuhan Joint Chapter and School of Optical and Electronic Information, HUST, Organize a Technical Talk [Chapters]
- IEEE CASS/EDS/SSCS Wuhan Joint Chapter and Huazhong University of Science and Technology Organize a Talk on Technology Trends [Chapters]
- IEEE CASS/EDS/SSCS Wuhan Joint Chapter and HUST Organize a Talk on Silicon-Based RF/Millimeter-Wave ICs [Chapters]
- IEEE CASS/EDS/SSCS Wuhan Joint Chapter and HUST Organize a Technical Talk [Chapters]
- IEEE CASS/EDS/SSCS Wuhan Joint Chapter and CASS IEEE Macau Chapter Organize an Outreach Online Seminar [Chapters]
- SSCS Switzerland Ph.D Students Highlights [Chapters]
- IEEE SSCS Hong Kong Student Chapter Activities [Chapters]
Aims & Scope - This new electronic publication provides relevant references pertaining to RFIC technology, paired with value-added editorial commentary from technology experts. The RFIC Virtual Journal aims to be the leading focal point on radio frequency integrated circuits from a worldwide perspective by collecting and disseminating knowledge on theory; enabling technologies, design methodologies, fabrication, testing of radio frequency integrated circuits, and systems; and determining which process signals to be transmitted or received through wireless communication.
To access this journal content have your IEEE Xplore login information ready and click here.
- Editorial Welcome to the New Editor-in-Chief
- A 5-V-Program 1-V-Sense Anti-Fuse Technology Featuring On-Demand Sense and Integrated Power Delivery in a 22-nm Ultra Low Power FinFET Process
- 10-nm SRAM Design Using Gate-Modulated Self-Collapse Write-Assist Enabling 175-mV
V MIN Reduction With Negligible Active Power Overhead - A 9-bit, 45 mW, 0.05 mm2 Source-Series-Terminated DAC Driver With Echo Canceller in 22-nm CMOS for In-Vehicle Communication
- A 40-nm Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent IoT Sensors
- High Slew-Rate Quadruple-Voltage Mixed-Quenching Active-Resetting Circuit for SPADs in 0.35-
m CMOS for Increasing PDP