Publications
SSCS proudly sponsors six top-notch publications as complimentary member benefits in print and electronic formats. The IEEE Journal of Solid-State Circuits (JSSC) - historically one of the top-five downloaded technical journals on IEEE Xplore - is available on-line and in print. The electronic-only Solid-State Circuits Letters (SSC-L) is a brief format companion to the JSSC that offers fast turnaround to authors for the latest innovations in our field. The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) - an open-access monthly accessible free of charge via IEEE Xplore - offers researchers a journal to publish and extend their research results with supplementary technical materials. Our newest open-access journal, IEEE Open Journal of Solid-State Circuits launches in Fall 2020.
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John Long Vice President of Publications |
Members also receive the IEEE Solid-State Circuits Magazine free of charge (in print and on-line), which is a tutorial-level quarterly featuring pioneering breakthroughs, trending topics, and “who’s who” reports about IC community leaders and international, regional, and local award recipients. Other electronic-only publications are the RFIC Virtual Journal, a one-stop, curated compilation of RFIC papers within the publications library of the IEEE, and IEEE Design & Test Magazine, which offers insight into models, methods and tools for microelectronic systems.
- IEEE JOURNAL OF SOLID-STATE CIRCUITS
- Guest Editorial Special Section on the 45th IEEE European Solid-State Circuits Conference (ESSCIRC)
- A Single-Chip Bidirectional Neural Interface With High-Voltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS
- A 128 128 SPAD Motion-Triggered Time-of-Flight Image Sensor With In-Pixel Histogram and Column-Parallel Vision Processor
- 1310/1550 nm Optical Receivers With Schottky Photodiode in Bulk CMOS
- Low-Power Highly Selective Channel Filtering Using a TransconductorCapacitor Analog FIR
- A 64-Channel Transmit Beamformer With 30-V Bipolar High-Voltage Pulsers for Catheter-Based Ultrasound Probes
- A 4-GS/s 39.9-dB SNDR 11.7-mW Hybrid Voltage-Time Two-Step ADC With Feedforward Ring Oscillator-Based TDCs
- Analysis and Design of a 260-MHz RF Bandwidth 22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA
- A Cellular Multiband DTC-Based Digital Polar Transmitter With 153-dBc/Hz Noise in 14-nm FinFET
- A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/
f Noise Upconversion Caused by Short-Channel Effects - Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication
- A 50112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS
- An 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity for On-Device Speech Recognition
- C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism
- An All-Digital,
$V_{mathrm{MAX}}$ - High-Rejection RF Code Domain Receivers for Simultaneous Transmit and Receive Applications
- A Fully Integrated Programmable 6.08.5-GHz UWB IR Transmitter Front-End for Energy-Harvesting Devices
- Analog I/Q FIR Filter in 55-nm SiGe BiCMOS for 16-QAM Optical Communications at 112 Gb/s
- An iPWM Line-Coding-Based Wireline Transceiver With Clock -Domain Encoding for Compensating Up To 27-dB Loss While Operating at 0.5-to-0.9 V and 3-to-16 Gb/s in 65-nm CMOS
- Special Topic on Exploratory Devices and Circuits for Compute-in-Memory
- Energy-Efficient Moderate Precision Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Arrays
- Accurate Inference With Inaccurate RRAM Devices: A Joint Algorithm-Design Solution
- A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
- A Relaxed Quantization Training Method for Hardware Limitations of Resistive Random Access Memory (ReRAM)-Based Computing-in-Memory
- Memristor-Based Analog Recursive Computation Circuit for Linear Programming Optimization
- Short-Term Long-Term Compute-in-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation
- Analyzing the Effects of Interconnect Parasitics in the STT CRAM In-Memory Computational Platform
- A DNA Read Alignment Accelerator Based on Computational RAM
- A Spiking Recurrent Neural Network With Phase-Change Memory Neurons and Synapses for the Accelerated Solution of Constraint Satisfaction Problems
- aCortex: An Energy-Efficient Multipurpose Mixed-Signal Inference Accelerator
See more issues of IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
- Staff List
- [Contributors]
- Welcome to the Spring 2020 Issue of IEEE Solid-State Circuits Magazine! [Editor's Note]
- Society Update [President's Corner]
- Never Waste a Good Crisis
- The Active Inductor [A Circuit for All Seasons]
- Transimpedance Amplifier [Circuit Intuitions]
- Klaas Bult: The Broadcom Netherlands Years
- The Master of Clarity: Klaas Bult's Unique Gift
- Recognizing the Remarkable Achievements of Klaas Bult: Memories of an Analog Magician's Early Days at UCLA and Broadcom
- Down With Noise: An Introduction to a Low-Noise Amplifier Survey
- Bidirectional Bioelectronic Interfaces: System Design and Circuit Implications
- Time-Encoding Analog-to-Digital Converters: Bridging the Analog Gap to Advanced Digital CMOS-Part 1: Basic Principles
- Highlights From the SSCS 2020 Chapter Chairs Luncheon and Meeting [Chapters]
- IEEE CAS-EDS-SSCS Wuhan Joint Chapter Holds Opening Ceremony and Advanced IC Forum [Chapters]
- Distinguished Lecturer Ahmed Ali Visits IEEE SSCS Utah Chapter [Chapters]
- Switzerland Lecture on Circuit and Device Implications for Reliable Flash and Phase-Change Memory [Chapters]
- Two Successful ACTS Programs Are Held in China [Chapters]
- SSCS University of Texas at Dallas Student Chapter Inaugurated in November 2019 [Chapters]
- IEEE SSCS Houston Chapter Hosts Distinguished Lecturer Prof. Rikky Muller at Rice University [Chapters]
Aims & Scope - This new electronic publication provides relevant references pertaining to RFIC technology, paired with value-added editorial commentary from technology experts. The RFIC Virtual Journal aims to be the leading focal point on radio frequency integrated circuits from a worldwide perspective by collecting and disseminating knowledge on theory; enabling technologies, design methodologies, fabrication, testing of radio frequency integrated circuits, and systems; and determining which process signals to be transmitted or received through wireless communication.
To access this journal content have your IEEE Xplore login information ready and click here.
- A 0.58-to-0.9-V Input 0.53-V Output 2.4-
$mu$ - A Cryogenic CMOS Parametric Amplifier
- A 117-dB In-Band CMRR 98.5-dB SNR Capacitance-to-Digital Converter for Sub-nm Displacement Sensing With an Electrically Floating Target
- A 2.6 TOPS/W 16-Bit Fixed-Point Convolutional Neural Network Learning Processor in 65-nm CMOS
- A 1-V 8.1-
$mu$ - Novel Pulse-Based Analog Divider With Digital Output