Publications
SSCS proudly sponsors six top-notch publications as complimentary member benefits in print and electronic formats. The IEEE Journal of Solid-State Circuits (JSSC) - historically one of the top-five downloaded technical journals on IEEE Xplore - is available on-line and in print. The electronic-only Solid-State Circuits Letters (SSC-L) is a brief format companion to the JSSC that offers fast turnaround to authors for the latest innovations in our field. The IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JxCDC) - an open-access monthly accessible free of charge via IEEE Xplore - offers researchers a journal to publish and extend their research results with supplementary technical materials. Our newest open-access journal, IEEE Open Journal of Solid-State Circuits launches in Fall 2020.
|
Shanthi Pavan Vice President of Publications |
Members also receive the IEEE Solid-State Circuits Magazine free of charge (in print and on-line), which is a tutorial-level quarterly featuring pioneering breakthroughs, trending topics, and “who’s who” reports about IC community leaders and international, regional, and local award recipients. Other electronic-only publications are the RFIC Virtual Journal, a one-stop, curated compilation of RFIC papers within the publications library of the IEEE, and IEEE Design & Test Magazine, which offers insight into models, methods and tools for microelectronic systems.
- IEEE JOURNAL OF SOLID-STATE CIRCUITS
- A W-Band Single-Antenna FMCW Radar Transceiver With Adaptive Leakage Cancellation
- A High-Power Broadband Multi-Primary DAT-Based Doherty Power Amplifier for mm-Wave 5G Applications
- An LO Leakage Suppression Technique for Blocker-Tolerant Wideband Receivers With High-
Q Selectivity at RF Input - 120-GHz Wideband I/Q Receiver Based on Baseband Equalizing Technique
- A 2-D Mode-Switching Quad-Core Oscillator Using E-M Mixed-Coupling Resonance Boosting
- A 0.58-mm2 2.76-Gb/s 79.8-pJ/b 256-QAM Message-Passing Detector for a 128 32 Massive MIMO Uplink System
- A MM-Wave Current-Mode Inverse Outphasing Transmitter Front-End: A Circuit Duality of Conventional Voltage-Mode Outphasing
- A Distributed Stubs Technique to Mitigate Flicker Noise Upconversion in a mm-Wave Rotary Traveling-Wave Oscillator
- A 134-
W 99.4-dB SNDR Audio Continuous-Time Delta-Sigma Modulator With Chopped Negative-R and Tri-Level FIR-DAC - A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC
- A Four-Element 500-MHz 40-mW 6-bit ADC-Enabled Time-Domain Spatial Signal Processor
- A 1.8-nW, 73.5-dB PSRR, 0.2-ms Startup Time, CMOS Voltage Reference With Self-Biased Feedback and Capacitively Coupled Schemes
- Fully Integrated Switched-Inductor-Capacitor Voltage Regulator With 0.82-A/mm2 Peak Current Density and 78 Peak Power Efficiency
- A Self-Gating RF Energy Harvester for Wireless Power Transfer With High-PAPR Incident Waveform
- A 0.65-mW-to-1-W Photovoltaic Energy Harvester With Irradiance-Aware Auto-Configurable Hybrid MPPT Achieving 95 MPPT Efficiency and 2.9-ms FOCV Transient Time
- A 3.5-mV Input Single-Inductor Self-Starting Boost Converter With Loss-Aware MPPT for Efficient Autonomous Body-Heat Energy Harvesting
- A Sub-nW Single-Supply 32-kHz Sub-Harmonic Pulse Injection Crystal Oscillator
- Four-Channel Differential Lock-in Amplifiers With Autobalancing Network for Stimulated Raman Spectroscopy
- A 0.250.4-V, Sub-0.11-mW/GHz, 0.151.6-GHz PLL Using an Offset Dual-Path Architecture With Dynamic Charge Pumps
- Staff List
- [Contributors]
- Welcome to the Winter 2021 Issue of IEEE Solid-State Circuits Magazine [Editor?s Note]
- A Year of Working Together [President's Corner]
- The Design of a Bootstrapped Sampling Circuit [The Analog Mind]
- The Resistor-Capacitor Circuit [Circuit Intuitions]
- Errata
- Paul Brokaw: IEEE Donald O. Peterson Award Winner
- Brokaw Bonus Tracks: A Few Lesser-Known Tunes
- References Supplied on Request: Paul Brokaw's Stamp on Analog IC Design
- Paul Brokaw, Jedi Master: Lessons From a Wizard
- Exploring Multimode Cellular Transceiver Design: A Short Tutorial
- Trends and New Opportunities in Digital Phase-Locked Loop Design: Design Principles, Key Overheads, and New Opportunities in This Emerging Architecture
- Memories of James D. Meindl: A Tribute [People]
- Dreamer of the Art of the Possible [People]
- Child-Like Curiosity and Enthusiasm [People]
- Three Outstanding Merits of Meindl's Career: A Personal View [People]
- A Model of Leadership, Kindness, and Humility [People]
- "Impossible" Problems, Unexpected and Powerful Outcomes [People]
- A Visionary and Nurturer [People]
Aims & Scope - This new electronic publication provides relevant references pertaining to RFIC technology, paired with value-added editorial commentary from technology experts. The RFIC Virtual Journal aims to be the leading focal point on radio frequency integrated circuits from a worldwide perspective by collecting and disseminating knowledge on theory; enabling technologies, design methodologies, fabrication, testing of radio frequency integrated circuits, and systems; and determining which process signals to be transmitted or received through wireless communication.
To access this journal content have your IEEE Xplore login information ready and click here.
- Editorial Welcome to the New Editor-in-Chief
- A 5-V-Program 1-V-Sense Anti-Fuse Technology Featuring On-Demand Sense and Integrated Power Delivery in a 22-nm Ultra Low Power FinFET Process
- 10-nm SRAM Design Using Gate-Modulated Self-Collapse Write-Assist Enabling 175-mV
V MIN Reduction With Negligible Active Power Overhead - A 9-bit, 45 mW, 0.05 mm2 Source-Series-Terminated DAC Driver With Echo Canceller in 22-nm CMOS for In-Vehicle Communication
- A 40-nm Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent IoT Sensors
- High Slew-Rate Quadruple-Voltage Mixed-Quenching Active-Resetting Circuit for SPADs in 0.35-
m CMOS for Increasing PDP