IEEE Journal of Solid-State Circuits

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An Intelligent Vision SoC With Fully Analog Sensing-to-Inference Pipeline and Linearity-Recovery RRAM Compute-in-Memory

An Intelligent Vision SoC With Fully Analog Sensing-to-Inference Pipeline and Linearity-Recovery RRAM Compute-in-Memory 150 150
Author(s): Zhengke Yang, Xiao Liu, Haofeng Yu, Zhen Kong, Humiao Li, Liang Ran, Zhichao Lu, Xinhe Feng, Liang Zhao, Yida Li, Jiamin Li, Feichi Zhou, Longyang Lin

Abstract:

Edge vision systems that integrate image sensing and neural-network inference on a single chip are constrained by inter-layer analog-to-digital converters (ADCs) and on-chip weight storage density, which together limit system efficiency and network scale. This article presents a fully analog vision system-on-chip (SoC) with 2-Mbit multi-level-cell (MLC) resistive random access …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3737258
Publisher: IEEE

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A 28.71-ppm/°C Voltage Reference With 0.000006%/V Line Sensitivity and 35 μs Start-Up Time for High Voltage Applications

A 28.71-ppm/°C Voltage Reference With 0.000006%/V Line Sensitivity and 35 μs Start-Up Time for High Voltage Applications 150 150
Author(s): Yining Wang, Xing Li, Yan Lu, Weiqiang Liu

Abstract:

This article proposes a voltage reference with a wide power supply range for high-voltage applications. A current-source-based voltage-limiting loop ensures that the core module of the circuit is implemented with CMOS, reducing chip area and quiescent current significantly. A PSRR enhancement circuit and a start-up acceleration circuit (SAC) improve full-band …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3737270
Publisher: IEEE

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A Modeling/Rendering Unified 3DGS Processor Based on Locality-Optimized Computation and Reconfigurable Architecture

A Modeling/Rendering Unified 3DGS Processor Based on Locality-Optimized Computation and Reconfigurable Architecture 150 150
Author(s): Xiaoyu Feng, Hedi Wang, Songran Xiao, Huazhong Yang, Yongpan Liu

Abstract:

Traditional 3-D Gaussian-splatting (3DGS) modeling relies on iterative optimization, leading to substantial latency and limited generalizability. Feedforward 3DGS alleviates these limitations by generating Gaussians through a single network inference. However, most existing processors are optimized for optimization-based 3DGS and do not fully exploit the distinct computational characteristics of feedforward 3DGS. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3737807
Publisher: IEEE

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A Low-Quiescent-Current, Low-Ripple Hybrid Converter With Efficient Energy Recycling for Low-Duty-Cycle SoCs

A Low-Quiescent-Current, Low-Ripple Hybrid Converter With Efficient Energy Recycling for Low-Duty-Cycle SoCs 150 150
Author(s): Jianxin Yang, Cheng Huang, Rui P. Martins, Xin Ming, Bo Zhang, Mo Huang

Abstract:

This article presents a modified hybrid Ladder converter for efficient energy recycling in low-duty-cycle systems-on-chip (SoCs) applications. Unlike the conventional schemes that recycle output-capacitor energy back to the battery, the proposed hybrid converter recycles energy into its own capacitors, eliminating battery-recharge losses and improving recycle/recharge efficiency. The design methodology …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3738472
Publisher: IEEE

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A 20-mg mm-Scale Flying-Insect Localization Tag With Battery-Free Crystal-Less Burst-Mode Transmitter Achieving 1.45-km Range

A 20-mg mm-Scale Flying-Insect Localization Tag With Battery-Free Crystal-Less Burst-Mode Transmitter Achieving 1.45-km Range 150 150
Author(s): Yi Shen, Steve Young, Demba Komma, Ryan Strohman, Rahul Narasimha, Jeongtaek Chang, Andrea Bejarano-Carbo, Yunfan Wang, Guanren Tao, Hun-Seok Kim, David Blaauw

Abstract:

This article presents a 20-mg, battery-free, crystal-less transmitter (TX) tag for flying-insect localization, implemented in 28-nm CMOS. The tag consists of a TX chip, a co-designed $10~times ~5$ -mm loop antenna, photovoltaic (PV) cells, and three 10  $mu $ F 0201 multilayer ceramic capacitors (MLCCs) for energy storage. A capacitor-buffered burst-mode power architecture with …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3737710
Publisher: IEEE

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End-to-End AI-Enabled mmWave Amplifier Design Combining Reinforcement Learning and Inverse Design

End-to-End AI-Enabled mmWave Amplifier Design Combining Reinforcement Learning and Inverse Design 150 150
Author(s): Jonathan Zhou, Emir Ali Karahan, Juho Park, Sherif Ghozzy, Zheng Liu, Hossein Jalili, Kaushik Sengupta

Abstract:

In this article, we present an end-to-end AI-driven design methodology for radio frequency integrated circuits (RFICs) and validate it with silicon measurements spanning 24–150 GHz. RFIC design requires tight co-design among architecture, circuit topology, and electromagnetic (EM) structures, where each decision strongly influences the others. This highly coupled design space has …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 19
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3734922
Publisher: IEEE

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A 128-Core 340-GHz 2-D Steerable Array With Efficient Third-Harmonic Enhancement Network and 35-dBm Lensless EIRP in 65-nm CMOS

A 128-Core 340-GHz 2-D Steerable Array With Efficient Third-Harmonic Enhancement Network and 35-dBm Lensless EIRP in 65-nm CMOS 150 150
Author(s): Huibo Wu, Xuan Liu, Shunhua Hu, Quanqin Liao, Yuqun Liu, Xingcun Li, Jianhao Gong, Yue Li, Liang Gao, Wenhua Chen

Abstract:

In this article, a coherent 128-core 340-GHz radiator array is presented. In this array, an efficient third-harmonic enhancement network based on the compact multi-coupling transformer balun is proposed. This network boosts the third-harmonic generation by leveraging the mixing effect between the fundamental andsecond-harmonic components, while improving the balance of the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3731143
Publisher: IEEE

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A Hybrid-Bonded 12.1 TOPS/mm2 56-Core DNN Processor With 2.5 Tb/s/mm2 3D Network on Chip in Intel 18A and Intel 3

A Hybrid-Bonded 12.1 TOPS/mm2 56-Core DNN Processor With 2.5 Tb/s/mm2 3D Network on Chip in Intel 18A and Intel 3 150 150
Author(s): Phil C. Knag, Gregory K. Chen, Shanshan Xie, Satish Yada, Wei Wu, Yu-Shiang Lin, Alexander Kashirin, Xiemei Meng, Russell Criss, Ana Sonia Leon, Carlos Tokunaga, Ram K. Krishnamurthy, James W. Tschanz

Abstract:

This article presents a modular 3D stacked manycore processor that integrates a general-purpose RISC-V base die with a domain-specific deep neural network (DNN) accelerator die using a 9 $\mu $ m hybrid-bonded interconnect (HBI). A custom $14 \times 4~\times 2$ 3D network-on-chip (3D NoC) provides a flat, distributed shared-memory address space across 112 tiles, enabling …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3735250
Publisher: IEEE

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A 28-nm CMOS 1-Chip In-Pixel Memory Backplane Circuit for 1800 × 1350 6652-PPI MicroLED AR Glasses With Per-Pixel Current Sensing and Compensation

A 28-nm CMOS 1-Chip In-Pixel Memory Backplane Circuit for 1800 × 1350 6652-PPI MicroLED AR Glasses With Per-Pixel Current Sensing and Compensation 150 150
Author(s): Sunkwon Kim, Yongil Kwon, Youngkil Choi, Taehyun Kwon, Seongyoung Ryu, Sewhan Na, Kangjoo Kim, Uijong Song, Heejin Lee, Hyun-Wook Lim, Jongwoo Lee, Jae-Youl Lee

Abstract:

This article presents a 28-nm CMOS 1-chip LED-on-Silicon (LEDoS) backplane (BP) for 6652-pixel-per-inch (PPI) microLED ( $mu $ LED) augmented reality (AR) displays. To address power and display quality challenges in AR glasses, the proposed BP employs two low-power techniques: self-refresh and partial update, and introduces four display quality enhancement methods: MSB …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3737236
Publisher: IEEE

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