IEEE Journal of Solid-State Circuits

CORDIC-Less Digital Polar Transmitter Architecture Based on Delta-Sigma Modulator

CORDIC-Less Digital Polar Transmitter Architecture Based on Delta-Sigma Modulator 150 150

Abstract:

Conventional digital polar transmitters (TXs) suffer from limited power efficiency and linearity due to the multi-bit nature of intermediate signals. This work proposes a digital polar TX architecture that avoids such drawbacks by reducing the bit count of TX signals. The proposed TX oversamples and quantizes multi-bit I/Q inputs …

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A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS

A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS 150 150

Abstract:

This work presents a 48-Gb/s four-level pulse amplitude modulation (PAM-4) optical receiver (ORX) with a linear analog front-end (AFE) and an integrated sampler. The AFE employs a transadmittance-stage transimpedance-stage (TAS-TIS) topology, replacing conventional CML-based variable gain amplifiers (VGAs) and post-amplifiers, avoiding continuous-time linear equalizers and passive inductors while preserving …

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A Zero-Voltage Switching Buck Converter With Enhanced Efficiency Over a Wide Load Range

A Zero-Voltage Switching Buck Converter With Enhanced Efficiency Over a Wide Load Range 150 150

Abstract:

This article presents a wide-input-range buck converter featuring a conduction-loss-minimized zero-voltage switching (ZVS) technique. The proposed ZVS topology enables accurate ZVS operation across a wide range of input voltage ( $V_{\mathrm {IN}}$ ) and load current ( $I_{\mathrm {O}}$ ). By keeping the auxiliary inductor current pulse in the ZVS branch separate …

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A 28-nm Computing-in-Memory Processor With Zig-Zag Backbone-Systolic CIM and Block-/Self-Gating CAM for NN/Recommendation Applications

A 28-nm Computing-in-Memory Processor With Zig-Zag Backbone-Systolic CIM and Block-/Self-Gating CAM for NN/Recommendation Applications 150 150

Abstract:

Computing-in-memory (CIM) chips have demonstrated promising energy efficiency for artificial intelligence (AI) applications such as neural networks (NNs), Transformer, and recommendation system (RecSys). However, several challenges still exist. First, a large gap between the macro and system-level CIM energy efficiency is observed. Second, several memory-dominate operations, such as embedding in …

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Energy-Efficient Reconfigurable XGBoost Inference Accelerator With Modular Unit Trees via Selective Node Execution and Data Movement

Energy-Efficient Reconfigurable XGBoost Inference Accelerator With Modular Unit Trees via Selective Node Execution and Data Movement 150 150

Abstract:

The extreme gradient boosting (XGBoost) has emerged as a powerful AI algorithm, achieving high accuracy and winning multiple Kaggle competitions in various tasks including medical diagnosis, recommendation systems, and autonomous driving. It has great potential for running on edge devices due to its binary tree-based simple computing kernel, offering unique …

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Laser Voltage Probing Attack Detection via Leakage Shift Monitoring Without Dedicated Sensors at 4.35% Area Overhead

Laser Voltage Probing Attack Detection via Leakage Shift Monitoring Without Dedicated Sensors at 4.35% Area Overhead 150 150

Abstract:

In this article, a novel architecture to detect laser voltage probing (LVP) attacks is introduced to make silicon systems secure against such threats, while pushing the area overhead to a level that is compatible with low-cost chip products. The inherent and sharp temperature rise due to the presence of a …

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A Two-Stage 12–1-V Converter Featuring Regulated Resonant SC Regulators and Collaborative Control Scheme

A Two-Stage 12–1-V Converter Featuring Regulated Resonant SC Regulators and Collaborative Control Scheme 150 150

Abstract:

In the field of power converters for data centers, the two-stage architecture has received widespread attentions due to its various advantages. Especially, the switched-capacitor voltage regulator (SCVR) becomes popular as the second-stage converter owing to its high efficiency and power density. However, the SCVR suffers from poor voltage regulation and …

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A Filter-Embedded Pipe-SAR ADC With Progressive Conversion and Floating Charge Transfer Amplifier

A Filter-Embedded Pipe-SAR ADC With Progressive Conversion and Floating Charge Transfer Amplifier 150 150

Abstract:

This article presents a filter-embedded pipelined successive-approximation (SAR) (pipe-SAR) analog-to-digital converter (ADC) architecture that achieves high efficiency and wide bandwidth for next-generation wireless applications. A progressive conversion technique is proposed to improve the conversion speed of filter-embedded SAR ADCs by parallelizing the filtering and SAR quantization phases, which also provides …

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A Compact and Power Efficient 10-Bit Source-Driver IC With Low-Voltage Gamma Slope DAC for Mobile OLED Displays

A Compact and Power Efficient 10-Bit Source-Driver IC With Low-Voltage Gamma Slope DAC for Mobile OLED Displays 150 150

Abstract:

This article presents a compact and power efficient 10-bit source driver IC (SD-IC) for mobile organic light emitting diodes (OLEDs) displays, with a proposed low-voltage (LV) gamma slope digital-to-analog converter (DAC), MSB-dependent segment restorer (MDSR), and data/phase-dependent current modulation (DPCM). Conventional SD-IC uses a high-voltage (HV) resistor DAC (RDAC), …

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