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Abstract: Three-dimensional integrated circuits (3D ICs) are shaping the future of AI hardware by stacking multiple chips vertically to achieve higher bandwidth, lower latency, and better energy efficiency. But this vertical integration also introduces new design challenges, including heat dissipation, power delivery, cross-layer timing, clock distribution, routing congestion, and multi-physics reliability, making manual design impractical. […]

Abstract: Traditionally, chip-scale RF system design has been in the domain of the expert, dominated by thumb rules and trial-and-error techniques. Designing these ICs, which form the bedrock of wireless networks, is complex, time-consuming, requires years of expertise, and is therefore very expensive. Historically, the design process for RF ICs has relied on intuition-based approaches […]