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A 39.4-mW 300 MHz-BW 70.9 dB-SNDR Hybrid ADC With Resistive Input and 200 fs, rms-Jitter Tolerance

A 39.4-mW 300 MHz-BW 70.9 dB-SNDR Hybrid ADC With Resistive Input and 200 fs, rms-Jitter Tolerance 150 150
Author(s): Yanquan Luo, Mingtao Zhan, Yi Zhong, Nan Sun

Abstract:

This letter presents a power-efficient hybrid ADC architecture: a low-resolution continuous-time (CT) delta-sigma modulator (DSM) followed by a time-interleaved pipeline stage which further quantizes the quantization noise of the DSM. In the frontend CT DSM, the resistive input makes the ADC easy-to-drive, and the direct-charge-dump feedback (DCD FB) provides a …

Published in: IEEE Solid-State Circuits Letters
Page(s): 61 – 64
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3656180
Publisher: IEEE

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A Bidirectional Neuromodulation Chipset With Algorithm-Aware AFE Optimization and High-Voltage-Compliant Stimulation

A Bidirectional Neuromodulation Chipset With Algorithm-Aware AFE Optimization and High-Voltage-Compliant Stimulation 150 150
Author(s): Xiaohua Huang, Hoda Yassin, Beatriz Lafuente Alcazar, Arash Akhoundi, Dante G. Muratore

Abstract:

This work presents a bidirectional neuromodulation chipset with 64-channel neural analog front-end (AFE), and a four-channel current stimulator. The chipset employs a heterogeneous architecture, combining a 28-nm low-voltage (LV) CMOS process for the AFE and the digital backend (DBE) to improve area and power efficiency, with a 180-nm high-voltage (HV) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3650066
Publisher: IEEE

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An 11.95-ENOB 560-MS/s Amplifier-Switching Subranging Analog-to-Digital Converter With Multi-Threshold Comparators

An 11.95-ENOB 560-MS/s Amplifier-Switching Subranging Analog-to-Digital Converter With Multi-Threshold Comparators 150 150
Author(s): Ritaro Takenaka, Tetsuya Iizuka

Abstract:

This article proposes a 14-bit, 560-MS/s subranging analog-to-digital converter (ADC) that employs an amplifier-switching architecture with multi-threshold comparators. The proposed amplifier-switching architecture reuses a flash quantizer multiple times during subranging conversion by amplifying the residue voltage with an appropriate gain at each quantization step. This approach reduces the required …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3647024
Publisher: IEEE

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A 4 × 224 Gb/s Single-Ended PAM-4 Transceiver Front-End With Noise Suppression Technique and Cascaded Equalizers in 130-nm SiGe BiCMOS

A 4 × 224 Gb/s Single-Ended PAM-4 Transceiver Front-End With Noise Suppression Technique and Cascaded Equalizers in 130-nm SiGe BiCMOS 150 150
Author(s): Xiongshi Luo, Xuewei You, Zhenghao Li, Hongzhi Wu, Yangyi Zhang, Fuzhan Chen, Xuxu Cheng, Wentao Zhou, Quan Pan

Abstract:

A dc-coupled analog single-ended (SE) transceiver (TRX) front-end supporting 224 Gb/s/lane is presented. It features SE-to-differential (S2D) and differential-to-SE (D2S) conversion, power-efficient broadband analog equalization, and noise suppression. Both the transmitter and receiver front-ends adopt pseudodifferential structures with dual-loop regulators to achieve a high power supply rejection …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 10
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3644437
Publisher: IEEE

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A 57.3-fps 12.8 TFLOPS/W Text-to-Motion Processor With Inter-Iteration Output Sparsity and Inter-Frame Joint Similarity

A 57.3-fps 12.8 TFLOPS/W Text-to-Motion Processor With Inter-Iteration Output Sparsity and Inter-Frame Joint Similarity 150 150
Author(s): Jaehoon Heo, Adiwena Putra, Sungwoong Yune, Jieon Yoon, Hangyeol Lee, Ji-Hoon Kim, Joo-Young Kim

Abstract:

Recently, 3-D human motion generation has become essential in media applications such as film production and augmented reality (AR)/virtual reality (VR) devices, requiring the generation of human joint movements and detailed 3-D meshes for each joint. Traditionally, joint creation required hours or even days, making it impractical for real-time …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3631087
Publisher: IEEE

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A Calibration-Free Pipelined-SAR ADC With Cross-Stage Gain-Mismatch Error Shaping and Inherent Noise Shaping

A Calibration-Free Pipelined-SAR ADC With Cross-Stage Gain-Mismatch Error Shaping and Inherent Noise Shaping 150 150
Author(s): Jihang Gao, Yaohui Luan, Siyuan Ye, Jiajia Cui, Xinhang Xu, Linxiao Shen

Abstract:

This article presents a calibration-free pipelined-successive-approximation-register (SAR) analog-to-digital converter (ADC) based on the proposed cross-stage gain-mismatch-error shaping (CS-GMES) mechanism. The CS-GMES is realized by including the entire 2nd stage into MES operation to unify the gain error and the 2nd-stage mismatch error. A feedback capacitor provides cross-stage connection and mismatch …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624412
Publisher: IEEE

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A 560 μ W, 6 fA/√Hz, 146 dB-DR Ultrasensitive Current Readout Circuit for PWM-Dimming-Tolerant Under-Display Ambient Light Sensors

A 560 μ W, 6 fA/√Hz, 146 dB-DR Ultrasensitive Current Readout Circuit for PWM-Dimming-Tolerant Under-Display Ambient Light Sensors 150 150
Author(s): Xiuzhi Zhao, Liheng Liu, Shi Chen, Tianxiang Qu, Qinjing Pan, Dan Li, Gan Guo, Zhiliang Hong, Jiawei Xu

Abstract:

This letter presents an ultralow-noise, power-efficient, and pulse-width modulation (PWM)-dimming-tolerant photocurrent readout circuit for under-display ambient light sensor (ALS). A transimpedance amplifier (TIA) with a feedback diode achieves G $\Omega $ -level resistance and 6 fA/ $\surd $ Hz input current noise, enabling sub-pA resolution. Instability and noise folding are mitigated at …

Published in: IEEE Solid-State Circuits Letters
Page(s): 361 – 364
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3626378
Publisher: IEEE

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A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management

A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management 150 150
Author(s): Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh S. Sathe

Abstract:

This article presents a fine-grained thermal sensing network for thermal management in SoCs. Sensor nodes in this network are made up of joint supply voltage ( $V_{\mathrm {dd}}$ ) and temperature ( $T$ ) sensors, which are compact and highly digital. Measurements from these simple but imperfect sensors are jointly processed to extract …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3621280
Publisher: IEEE

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A 14-b Energy-Efficient BW/Power Scalable CTDSM With a Frequency-Controlled Current Source

A 14-b Energy-Efficient BW/Power Scalable CTDSM With a Frequency-Controlled Current Source 150 150
Author(s): Xinjie Wu, Xiaopeng Yu, Nick Nianxiong Tan, Zhong Tang

Abstract:

This work presents a 14-bit energy-efficient bandwidth (BW)/power scalable continuous-time delta–sigma modulator (CTDSM) for sensor interfaces in IoT applications. To ensure low noise for small input signals and achieve BW/power scalability, it is built around Gm-C integrators biased via a linear frequency-controlled current source (FCCS). The FCCS …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 10
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3621527
Publisher: IEEE

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