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A Millimeter-Wave Direct Digital Transmitter Using Multiphase Subharmonic Switching PA

A Millimeter-Wave Direct Digital Transmitter Using Multiphase Subharmonic Switching PA 150 150
Author(s): Soumya Mahapatra, Mostafa Ayesh, Ce Yang, Mayank Palaria, Shiyu Su, Aoyang Zhang, Mike Shuo-Wei Chen

Abstract:

This article presents a direct digital transmitter (TX) employing a multiphase subharmonic switching (MP-SHS) power amplifier (PA) to achieve both high peak and power back-off (PBO) efficiency with wide signal bandwidth. A phase-shifted subharmonic (SH) local oscillator (LO) divider is proposed to suppress SH spurs with minimal implementation overhead by …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3605564
Publisher: IEEE

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An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm

An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm 150 150
Author(s): Chang Liu, Burak Catli, Yong Liu, Anand Vasani, Guansheng Li, Kun Chuai, Lakshmi Rao, Yang Liu, Xin Meng, Jiawen Zhang, Tim He, Batu Dayanik, Vadim Milirud, Meisam Honarvar Nazari, Hyo Gyuem Rhew, Derui Kong, Arvindh Iyer, Nan Wang, Alireza Nilchi, Aminghasem Safarian, Ray Wang, Hyung-Joon Jeon, Xiaochen Yang, Boyu Hu, Jerry Han, Adesh Garg, Kumar Thasari, Heng Zhang, Namik Kocaman, Ali Nazemi, Delong Cui, Afshin Momtaz, Jun Cao

Abstract:

This work presents a low power DSP-based single-chip 800GbE PAM-4 PHY transceiver in 7 nm process capable of driving eight lanes of up to 112-Gb/s. It supports both electrical and optical links with monolithic integrated laser driver enabling direct-drive PAM-4 output capability for EML and silicon photonics. The transceiver supports 42 …

Published in: IEEE Solid-State Circuits Letters
Page(s): 281 – 284
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3608134
Publisher: IEEE

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A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination

A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination 150 150
Author(s): Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joseph Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri

Abstract:

A four-channel vertical cavity surface-emitting laser (VCSEL)-based co-packaged optical (CPO) transceiver (TRX) is demonstrated, integrating a photodiode (PD) array, a trans-impedance amplifier front-end integrated circuit (TIA-FE IC), an electrical receiver (RX) IC, and optical fiber termination on a single package on the receive side. The transmitter (TX) counterpart incorporates …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3600662
Publisher: IEEE

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A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers

A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers 150 150
Author(s): Chenxin Liu, Yudai Yamazaki, Anyi Tian, Chun Wang, Hans Herdian, Abanob Shehata, Han Nie, Minzhe Tang, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This work presents a D-band bi-directional CMOS double-balanced mixer (DBM) supporting data rates over 160 Gb/s with a 58-GHz RF bandwidth (112–170 GHz). The mixer employs four identical NMOS passive switches ( $12~\mu $ m/60 nm) in a DBM topology, providing the isolation between RF, LO, and IF ports. Both IF and RF …

Published in: IEEE Solid-State Circuits Letters
Page(s): 241 – 244
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3597690
Publisher: IEEE

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A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver

A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver 150 150
Author(s): Yihao Yang, Dan Li, Nan Qi, Binhao Wang

Abstract:

This letter describes an ultra-low-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3584266
Publisher: IEEE

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Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring

Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring 150 150
Author(s): Jianwei Jia, Zhenge Jia, Omkar Phadke, Yiyu Shi, Shimeng Yu

Abstract:

Implantable cardioverter defibrillators (ICDs) provide real-time monitoring and immediate defibrillation for life-threatening arrhythmias. However, the intracardiac electrogram (IEGM) acquisition of ICDs faces stringent constraints, including power consumption, low-frequency noise, and patient-specific physiological variability. This article introduces an ultralow-power, high-resolution, reconfigurable three-stage bandpass filter designed specifically for IEGM, utilizing ferroelectric field-effect …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 67 – 73
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3584711
Publisher: IEEE

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A 45-V Auto-Zero-Stabilized Chopper Instrumentation Amplifier With 1.8- μ V Offset, 33.5- μ V Ripple, and 42-V Common-Mode Input Range

A 45-V Auto-Zero-Stabilized Chopper Instrumentation Amplifier With 1.8- μ V Offset, 33.5- μ V Ripple, and 42-V Common-Mode Input Range 150 150
Author(s): Jiahao Wang, Shen Ye, Shiqi Zhang, Zhiliang Hong, Jiawei Xu

Abstract:

This letter presents a 45V high-precision current-feedback instrumentation amplifier (CFIA) that combines both chopping and auto-zeroing (AZ) to achieve 1.8- $mu $ V input offset (10 samples) and 33.5- $mu $ V input-referred ripple. The AZ is duty cycled to minimize power and silicon area, with a parallel auxiliary path operating during AZ …

Published in: IEEE Solid-State Circuits Letters
Page(s): 173 – 176
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3576393
Publisher: IEEE

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A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique

A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique 150 150
Author(s): Xiangjian Kong, Kai Xu, Huanlin Xie, Mingchao Jian, Hao Lian, Robert Bogdan Staszewski, Chunbing Guo

Abstract:

This article presents a low-jitter sub-sampling chopper phase-locked loop (SS-CPLL) that incorporates a novel chopping charge pump (C-CP) to mitigate 1/f noise in short-channel devices operating at a low supply voltage of 0.75 V. A charge-share cancellation technique is introduced to suppress ripple generated by residual charge from the previous reference …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1384 – 1396
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3532504
Publisher: IEEE

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A Ping-Pong Charge-Sharing Locking PLL With Implicit Reference Doubling and Simultaneous Frequency/Duty-Cycle Calibrations

A Ping-Pong Charge-Sharing Locking PLL With Implicit Reference Doubling and Simultaneous Frequency/Duty-Cycle Calibrations 150 150
Author(s): Sayan Kumar, Teerachot Siriburanon, Sumit Dash, Patchara Sawakewang, Shuja Andrabi, Jon Strange, Khurram Muhammad, Chih-Ming Hung, Robert Bogdan Staszewski

Abstract:

We propose a new ping-pong (PP) charge-sharing locking (CSL) phase-locked loop (PLL) architecture that enhances the strength of charge-injection into the oscillator’s LC-tank using complementary charge-sharing capacitors during both positive and negative halves of the reference clock, effectively achieving an implicit $2times $ reference frequency multiplication. The design includes a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1368 – 1383
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3535888
Publisher: IEEE

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