Bandwidth

  • No Comments

An H-Band Continuous Broadband RF-Domain Quadrature Receiver Using a Harmonic-Enhanced LO Generator in 65-nm CMOS

An H-Band Continuous Broadband RF-Domain Quadrature Receiver Using a Harmonic-Enhanced LO Generator in 65-nm CMOS 150 150
Author(s): Weiping Wu, Xun Bao, Jingze Wang, Shi Chen, Shulan Chen, Yan Wang, Lei Zhang

Abstract:

This article presents an $H$ -band CMOS receiver chipset that covers a wide frequency range of 228–324 GHz, supporting the entire band of IEEE Std. 802.15.3d. The proposed receiver employs an RF-domain quadrature mixer-first architecture to alleviate the design burden of quadrature local oscillator (LO) signal generation in $H$ -band, which …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4584 – 4599
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697557
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping

A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping 150 150
Author(s): Xing Wang, Zhishuai Zhang, Yi Zhong, Nan Sun, Lu Jie

Abstract:

This work presents a compact second-order noise shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC) featuring a novel kT/C noise shaping technique. The proposed kT/C noise shaping technique selectively suppresses kT/C noise within the signal bandwidth of an oversampled SAR ADC. It avoids using a wideband noise …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 2798 – 2808
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3616265
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 31.5–36-GHz Low-Spur Digitally Assisted Gain-Boosting Charge-Sharing Locking PLL Achieving 54-fs RMS Jitter

A 31.5–36-GHz Low-Spur Digitally Assisted Gain-Boosting Charge-Sharing Locking PLL Achieving 54-fs RMS Jitter 150 150
Author(s): Chawin Khongprasongsiri, Sayan Kumar, Patchara Sawakewang, Robert Bogdan Staszewski, Teerachot Siriburanon

Abstract:

This article presents a 31.5–36 GHz digitally assisted gain-boosting (GB) charge-sharing locking (CSL) phase-locked loop (PLL) that achieves record-low reference spurs while maintaining sub-60 fs integrated jitter. In conventional CSL PLLs, reference spur suppression is fundamentally traded against loop bandwidth, whereas ping-pong CSL (PP-CSL) approaches typically require complex duty-cycle calibration. The …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3721352
Publisher: IEEE

View on IEEE Xplore

  • No Comments

MTDiff: A Multi-Task Diffusion Accelerator With Bandwidth-Aware Memory Partition and Efficient Digital Compute-in-Memory

MTDiff: A Multi-Task Diffusion Accelerator With Bandwidth-Aware Memory Partition and Efficient Digital Compute-in-Memory 150 150
Author(s): Jiaqi Zhou, Yiqi Jing, Yiyang Sun, Siyuan He, Le Ye, Tianyu Jia

Abstract:

Initially applied to image synthesis, diffusion models have rapidly expanded into various content generation tasks, such as 3-D scene reconstruction and video generation, due to the superior generative quality. Based on our observations, the imbalanced operational intensities across diffusion model layers lead to suboptimal hardware utilization due to inadequate bandwidth …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3718715
Publisher: IEEE

View on IEEE Xplore

  • No Comments

THz-TSI: A Terahertz Wireless Through-Silicon Interconnect Module for Advanced 3-D Integration Applications

THz-TSI: A Terahertz Wireless Through-Silicon Interconnect Module for Advanced 3-D Integration Applications 150 150
Author(s): Chen Jiang, Xiaodi Feng, Xiaohan Shen, Chixiao Chen, Qi Liu, Ming Liu, Ningsheng Xu

Abstract:

By vertically stacking device layers, advanced 3-D integration overcomes traditional planar scaling limits, delivering the bandwidth and power efficiency essential for modern artificial intelligence (AI) and high-performance computing (HPC) integrated systems. However, continued scaling of conventional through-silicon vias (TSVs) and microbumps presents critical bottlenecks due to inherent thermo-mechanical stress, complex …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3720291
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Fast-Settling mm-Wave LO With I/Q-Calibrated SSB Mixer and Frequency-Tuned ILO Filter Achieving Sub-ns Settling Time and −56 dBc Spur

A Fast-Settling mm-Wave LO With I/Q-Calibrated SSB Mixer and Frequency-Tuned ILO Filter Achieving Sub-ns Settling Time and −56 dBc Spur 150 150
Author(s): Jaewon Oh, Cheol So, Hyojun Kim, Songcheol Hong, SeongHwan Cho

Abstract:

This article presents a fast-settling 60-GHz local oscillator (LO) for stepped-carrier orthogonal frequency-division multiplexing (OFDM), employing an I/Q-calibrated single-sideband (SSB) mixer with a frequency-tuned injection-locked oscillator (ILO) filter. The SSB mixer enables instantaneous frequency hopping, while the ILO acts as a high- $Q$ bandpass filter that suppresses mixer-induced spurs. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 3435 – 3448
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3634591
Publisher: IEEE

View on IEEE Xplore

  • No Comments

BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator

BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator 150 150
Author(s): Tong Zhang, Yiwen Zhang, Xueke Cai, Weihao Jie, Yanling Zheng, Deyong Li, Yang Zhao, Yongfu Li, Honglan Jiang, Patrick P. Mercier, Hui Wang

Abstract:

This work presents a bandwidth augmented sub-sampling phase-locked loop (BASS-PLL) architecture that features simultaneous out-of-band noise suppression by direct and multipath sampling of the ring oscillator’s (ROs) output and in-band noise suppression via an intrinsic sub-sampling mechanism, ultimately combining the benefits of over-sampling PLLs (OS-PLLs) and sub-sampling PLLs (SS-PLLs) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 847 – 859
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3640726
Publisher: IEEE

View on IEEE Xplore

  • No Comments

An 18.4-Gb/s/pin Simultaneous Bidirectional Transceiver for Post HBM4 Using Four-Phase Hybrid Timing Alignment and Dual Equalization

An 18.4-Gb/s/pin Simultaneous Bidirectional Transceiver for Post HBM4 Using Four-Phase Hybrid Timing Alignment and Dual Equalization 150 150
Author(s): Minchang Kim, Hankyu Chi, Sooncheol Kwon, Icsu Oh, Seulgi Kim, Heewoong Song, Daeho Yun, Jaehong Jeong, Daejoon Kim, Kichul Hong, Jeonghyun Park, Woo-Seok Choi, Hae-Kang Jung, Hoyoung Son, Inchul Jeong, Hyungsoo Kim, Jonghwan Kim

Abstract:

This letter presents a simultaneous bidirectional (SBD) transceiver for post HBM4. It is difficult to increase the data rate due to poor channel characteristics of the silicon interposer and the limited physical area of the IO in high-bandwidth memory (HBM) interface. SBD signaling is attractive because it doubles the per-pin …

Published in: IEEE Solid-State Circuits Letters
Page(s): 182 – 185
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3696268
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Self-Injection LC Oscillator for Flicker Noise Reduction

A Self-Injection LC Oscillator for Flicker Noise Reduction 150 150
Author(s): Bahram Jafari, Ali Ghafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar

Abstract:

Self-injection has been used in lasers and photonic integrated circuits to reduce the laser’s phase noise (PN). We show that self-injection can be leveraged in GHz LC oscillators as well. Our oscillator employs a current-domain self-injection technique by leveraging second-harmonic extraction, capacitive phase shifting, and self-mixing through the oscillator’…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 816 – 829
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3643322
Publisher: IEEE

View on IEEE Xplore

Search this website