Bandwidth

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A Low-Power 10Mbps Squaring-First UWB Receiver Using Frequency Hopping and Two-Tone Modulation

A Low-Power 10Mbps Squaring-First UWB Receiver Using Frequency Hopping and Two-Tone Modulation 150 150
Author(s): Lexie Drackley, Aman Gupta, David D. Wentzloff

Abstract:

This paper presents a low-power 10Mbps squaring-first ultra-wideband (UWB) receiver using frequency hopping code-division multiple-access (FH-CDMA) and two-tone OOK modulation for wireless personal area networks (WPAN). The two-tone receiver architecture preserves IF filtering, improves resilience to narrowband interference, and saves power by eliminating the RF local oscillator. FH is applied …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3716852
Publisher: IEEE

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A3D-MoE: Acceleration of Large Language Models With Mixture of Experts via 3-D Heterogeneous Integration

A3D-MoE: Acceleration of Large Language Models With Mixture of Experts via 3-D Heterogeneous Integration 150 150
Author(s): Wei-Hsing Huang, Janak Sharda, Cheng-Jhih Shih, Yuyao Kong, Faaiq Waqar, Pin-Jun Chen, Yingyan Lin, Shimeng Yu

Abstract:

Conventional large language models (LLMs) have large parameter sets, making inference costly and energy-intensive; mixture-of-experts (MoEs) mitigates this by activating fewer weights per token, but fine-grained MoE LLMs still face runtime workload variability, inefficient conventional scheduling, and high bandwidth memory (HBM) loading energy/bandwidth demands. A3D-MoE addresses these with 3…

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 176 – 184
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3713957
Publisher: IEEE

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A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI 150 150
Author(s): Haisu Ju, Yingtao Zou, Gabriel M. Rebeiz

Abstract:

This article presents a 6.3–18.4 GHz in-phase and quadrature (I/Q) direct down-conversion receiver featuring reconfigurability in both the radio frequency (RF) and local oscillator (LO) paths. The receiver comprises a multi-band reconfigurable RF front-end, double-balanced passive I/Q mixers, an I/Q LO generation network with a tunable I/Q …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4558 – 4571
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698025
Publisher: IEEE

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A 256-Channel Solid-State Nanopore Readout Array With 193-pA TIAs and Event Detection at 1-MHz in 65-nm CMOS

A 256-Channel Solid-State Nanopore Readout Array With 193-pA TIAs and Event Detection at 1-MHz in 65-nm CMOS 150 150
Author(s): Sander Crols, Filip Tavernier, Carolina Mora Lopez, Marian Verhelst, Nick Van Helleputte

Abstract:

Solid-state nanopore single-molecule sensing aims to replace the commercially available biological nanopores. Array sizes have remained limited due to the area and power consumption of the transimpedance amplifiers (TIAs), thus preventing throughput and cost scaling. This article presents a 256-channel readout array for solid-state nanopore single-molecule sensing in 65 nm CMOS. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3721767
Publisher: IEEE

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A 40-Gb/s 8-mW-OMA GaN-Based 1-to-N VCSEL Driver for Parallel and Wireless Optical Transmitter Frontends

A 40-Gb/s 8-mW-OMA GaN-Based 1-to-N VCSEL Driver for Parallel and Wireless Optical Transmitter Frontends 150 150
Author(s): S. Sarah Feng, Fuzhan Chen, H. Bruce Bao, R. Matthew Ma, Kangping Zhong, P. T. Alan Lau, C. Patrick Yue

Abstract:

This letter presents a broadband, high-optical modulation amplitude (OMA) GaN-based 1-to-N VCSEL driver implemented in a 150-nm GaN HEMT process for parallel and wireless optical transmitter frontends. It further compares split-node and conventional VCSEL-driving topologies and analyzes the bandwidth scaling and inter-VCSEL timing skew of series- and parallel-connected VCSEL arrays. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 242 – 245
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3720689
Publisher: IEEE

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Integrated Low-Power Self-Coherent Kramers–Kronig Millimeter-Wave Receiver With Nonlinear Analog and Mixed-Signal Computing

Integrated Low-Power Self-Coherent Kramers–Kronig Millimeter-Wave Receiver With Nonlinear Analog and Mixed-Signal Computing 150 150
Author(s): Sherif Ghozzy, Muhamed Allam, Emir Ali Karahan, Zheng Liu, Kaushik Sengupta

Abstract:

A critical challenge in scaling up high-frequency wireless communication in the millimeter-Wave (mmWave) spectrum has been poor energy efficiency of the constituent transceivers, particularly on the highly energy constrained user equipment (UE). Receiving spectrally-efficient wireless signals (e.g., 64-quadrature amplitude modulation (QAM) etc.) require coherent transceivers with programmable frequency synthesizers, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 18
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3720585
Publisher: IEEE

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An H-Band Continuous Broadband RF-Domain Quadrature Receiver Using a Harmonic-Enhanced LO Generator in 65-nm CMOS

An H-Band Continuous Broadband RF-Domain Quadrature Receiver Using a Harmonic-Enhanced LO Generator in 65-nm CMOS 150 150
Author(s): Weiping Wu, Xun Bao, Jingze Wang, Shi Chen, Shulan Chen, Yan Wang, Lei Zhang

Abstract:

This article presents an $H$ -band CMOS receiver chipset that covers a wide frequency range of 228–324 GHz, supporting the entire band of IEEE Std. 802.15.3d. The proposed receiver employs an RF-domain quadrature mixer-first architecture to alleviate the design burden of quadrature local oscillator (LO) signal generation in $H$ -band, which …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4584 – 4599
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697557
Publisher: IEEE

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A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping

A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping 150 150
Author(s): Xing Wang, Zhishuai Zhang, Yi Zhong, Nan Sun, Lu Jie

Abstract:

This work presents a compact second-order noise shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC) featuring a novel kT/C noise shaping technique. The proposed kT/C noise shaping technique selectively suppresses kT/C noise within the signal bandwidth of an oversampled SAR ADC. It avoids using a wideband noise …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 2798 – 2808
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3616265
Publisher: IEEE

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A 31.5–36-GHz Low-Spur Digitally Assisted Gain-Boosting Charge-Sharing Locking PLL Achieving 54-fs RMS Jitter

A 31.5–36-GHz Low-Spur Digitally Assisted Gain-Boosting Charge-Sharing Locking PLL Achieving 54-fs RMS Jitter 150 150
Author(s): Chawin Khongprasongsiri, Sayan Kumar, Patchara Sawakewang, Robert Bogdan Staszewski, Teerachot Siriburanon

Abstract:

This article presents a 31.5–36 GHz digitally assisted gain-boosting (GB) charge-sharing locking (CSL) phase-locked loop (PLL) that achieves record-low reference spurs while maintaining sub-60 fs integrated jitter. In conventional CSL PLLs, reference spur suppression is fundamentally traded against loop bandwidth, whereas ping-pong CSL (PP-CSL) approaches typically require complex duty-cycle calibration. The …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3721352
Publisher: IEEE

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