Abstract: High bandwidth memory (HBM) has become a key enabler for AI computing, offering high bandwidth and low power consumption with small form factor. Its 3D-stacked architecture with a wide memory interface significantly enhances performance for AI workloads. However, to eliminate risks that may occur in the 3D stack structure, a lot of design techniques […]
Abstract: While integrated power converter is required in every modern electronic system, designing one that achieves both area- and power-efficient continues remains a challenge in many engineering teams. In this talk, the speaker will give an overview of integrated power converter design flow and some techniques in schematics and layout that would be very useful for […]
Abstract: Compute-in-memory (CIM) and processing-near-memory (PNM) have emerged as promising approaches to overcome the limitations of architectures that separate processing from memory. While this bottleneck is often attributed to von Neumann’s design, such critiques overlook its historical significance: the separation of logic and memory enabled the decoupling of software from hardware, laying the foundation for general-purpose […]
Abstract: This presentation will elaborate on some of the technical content of the paper of the same title published in the OJSSCS. The paper employs several methods that may be unfamiliar to readers. They are: How to separate PM from AM in a noise spectrum How to formulate approximate transfer functions for circuits subject to periodic […]
Abstract: Computing-in-memory (CiM), in conjunction with ultra-low precision (ULP) inputs and weights, promises a pathway towards the deployment of DNN workloads on resource-constrained edge platforms. For instance, CiM-enabled binary neural network (BNN) accelerators (with inputs and weights quantized to two states: {-1,1}) have shown potential by significantly reducing storage and energy cost while maintaining acceptable […]
