Name: High-Resolution Continuous-Time Zoom ADCs Featuring Advanced Filtering Techniques Presented by Youngcheol Chae | SSCS August Technical Webinar
Start: 2026-08-13T10:00:00+09:00
End: 2026-08-13T23:30:00+09:00
Location: Online

Event Series: SSCS Technical Webinars

Abstract: Continuous-time (CT) zoom analog-to-digital converters (ADCs) are highly efficient for high-resolution applications but typically suffer from DAC mismatch errors or require complex digital calibration. This talk presents advanced CT zoom ADC architectures that achieve state-of-the-art energy efficiency and high resolution by utilizing advanced filtering to ensure high linearity without explicit calibration. We focus on key innovations that address conventional trade-offs: Interstage Low-Pass and FIR Filtering, and Robust Mismatch Error Shaping (MES). Silicon prototypes fabricated in 28-nm and 65-nm CMOS demonstrate excellent performance, achieving an SFDR of up to 105.7 dB and a Schreier FoM exceeding 180 dB across bandwidths from 50 kHz to 1 MHz. This webinar will cover the theory, architectural trade-offs, and practical design techniques of these highly efficient, filtering-assisted CT zoom ADCs.

Registration: https://ieee.webex.com/weblink/register/ra0b2173e6e739377a5985cc6c9030ee8

Biography: Youngcheol Chae is currently a Full Professor in Electrical and Electronic Engineering at Yonsei University. Since joining in 2012, he has been leading the Yonsei Mixed-Signal IC Group, specializing in innovative analog and mixed-signal circuits and systems for communication, sensing, and biomedical applications. His team’s prolific output includes over 160 peer-reviewed papers and more than 50 patents, with over 70 state-of-the-art works published in premier venues like JSSC, ISSCC, and the VLSI Symposium. Dr. Chae has held key roles, including a TPC member of the International Solid-State Circuits Conference (ISSCC), the Asian Solid-State Circuits Conference (A-SSCC), and the Custom Integrated Circuits Conference (CICC), and served as a Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS). His major recognitions include the ISSCC 2021 Takuo Sugano Award for Outstanding Far-East Paper, the ISSCC Silkroad Award in 2017, the Haedong Young Engineer Award in 2017, the Outstanding Research Award of Yonsei University (2017, 2019, and 2020), and the Outstanding Teaching Awards of Yonsei University (2013, 2014). Currently, he is an Associate Editor of the Journal of Solid-State Circuits (JSSC) and Solid-State Circuits Letters (SSC-L).