Abstract: Traditionally, chip-scale RF system design has been in the domain of the expert, dominated by thumb rules and trial-and-error techniques. Designing these ICs, which form the bedrock of wireless networks, is complex, time-consuming, requires years of expertise, and is therefore very expensive. Historically, the design process for RF ICs has relied on intuition-based approaches […]
Abstract: With emerging trends such as machine learning, the internet of everything, brain–machine interfaces, autonomous driving, 6G communications, and quantum computing, circuit designers are increasingly challenged to achieve drastic improvements in accuracy, speed, and power efficiency. Yet, as CMOS circuit designs have matured over the past five decades, we often find ourselves constrained by well-established […]
Join the IEEE Solid‑State Circuits Society Women in Circuits (WiC) and Women in EDS for a networking luncheon open to all VLSI attendees. The event will feature brief, thought‑provoking remarks from SSCS and EDS representatives, followed by informal discussion and networking. Designed for attendees at all career stages, this session offers a relaxed setting to […]
Are you looking to accelerate your career, gain invaluable industry insights, or expand your professional circle? Join the IEEE Solid-State Circuits Society (SSCS) and the IEEE Electron Devices Society (EDS) for an evening of mentorship and networking designed specifically for students and young professionals. Held in conjunction with VLSI 2026, this event offers a relaxed, […]
Join IEEE SSCS YP and the IEEE Hawaii Jt. SSCS/EDS Chapter for an evening with members of the SSCS Distinguished Lecturer roster. The program will include condensed talks from select SSCS Distinguished Lecturers. Don’t miss this chance to see widely recognized experts in our field share their knowledge and experience through high-quality, polished presentations. Consider requesting […]
Abstract: Analog-to-digital converters that incorporate inherent anti-alias filtering and are easy to drive significantly simplify system design. The continuous-time pipelined (CTP) ADC is one such architecture — and it turns out to be a fundamental improvement over the conventional active filter followed by ADC cascade, both in power efficiency and linearity. This tutorial traces the […]
