IEEE Solid-State Circuits Letters – Journals

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A 550-μW Capacitor-Assisted Transformer-Based VCO Achieving 204-dBc/Hz FoMA at 1-MHz Frequency Offset

A 550-μW Capacitor-Assisted Transformer-Based VCO Achieving 204-dBc/Hz FoMA at 1-MHz Frequency Offset 150 150
Author(s): Teng-Shen Yang, Liang-Hung Lu

Abstract:

This letter presents a capacitor-assisted transformer (CTF)-based voltage-controlled oscillator (VCO) that achieves a low flicker-noise corner with submilliwatt power consumption and compact chip area. By introducing a small assisting capacitor into the transformer, the higher order tank impedance is reshaped from the second-resonance region toward the third-resonance region, resulting …

Published in: IEEE Solid-State Circuits Letters
Page(s): 150 – 153
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690818
Publisher: IEEE

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HyFPCiM: A 65-nm 417-μW Error-Sensitivity-Aware FP8 Compute-in-Memory Macro

HyFPCiM: A 65-nm 417-μW Error-Sensitivity-Aware FP8 Compute-in-Memory Macro 150 150
Author(s): Gaurav Kumar K, Yatharth Agarwal, Kaushik Roy

Abstract:

This letter presents HyFPCiM, a 65-nm FP8 compute-in-memory (CiM) macro that enables sub-mW floating-point (FP) inference using error-sensitivity-aware FP partitioning (EAP). EAP maps exponent processing to a digital CiM (DCiM) path and mantissa accumulation to an analog CiM (ACiM), avoiding the power- and area-intensive adder-tree-based accumulation used in prior FP-CiM …

Published in: IEEE Solid-State Circuits Letters
Page(s): 146 – 149
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3688988
Publisher: IEEE

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Corrections to “Opal: A 16-nm Coarse-Grained Reconfigurable Array SoC for Full Sparse Machine Learning Applications”

Corrections to “Opal: A 16-nm Coarse-Grained Reconfigurable Array SoC for Full Sparse Machine Learning Applications” 150 150
Author(s): Po-Han Chen, Bo Wun Cheng, Michael Oduoza, Zhouhua Xie, Rupert Lu, Sai Gautham Ravipati, Kalhan Koul, Alex Carsello, Yuchen Mei, Mark Horowitz, Priyanka Raina

Abstract:

Presents corrections to the paper, (Opal: A 16-nm Coarse-Grained Reconfigurable Array SoC for Full Sparse Machine Learning Applications).

Published in: IEEE Solid-State Circuits Letters
Page(s): 141 – 141
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3683139
Publisher: IEEE

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A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing

A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing 150 150
Author(s): Aoming Zhan, Ye Zhao, Yulin Zhang, Gengchen Han, Qihang Jiang, Long Chen, Yumei Zhou, Shushan Qiao

Abstract:

With the growing demand for energy-efficient convolutional neural network (CNN) accelerators in edge intelligence, conventional digital CNN processors with fixed precision incur excessive switching energy and limited scalability. This work presents a time-domain CNN (TD-CNN) engine that achieves adaptive precision and computation reduction for ultralow-power operation. The main features include: 1) …

Published in: IEEE Solid-State Circuits Letters
Page(s): 142 – 145
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3687395
Publisher: IEEE

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An 800-MS/s 13-b 2× TI Pipelined-SAR ADC With Rapid Digital Amplification

An 800-MS/s 13-b 2× TI Pipelined-SAR ADC With Rapid Digital Amplification 150 150
Author(s): Peizhe Li, Danfeng Zhai, Qi Liu, Chixiao Chen

Abstract:

This work proposes a rapid digital amplification (RDA) with residue-aware reference, offering an equivalent open-loop (OL) gain enhancement of 25 dB and reducing the interstage gain error (ISGE)-induced SNR degradation by 20 dB, with an extra amplification latency of only 200 ps. It is implemented in an 800-MS/s 13-b two-way time-interleaved (…

Published in: IEEE Solid-State Circuits Letters
Page(s): 137 – 140
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3684735
Publisher: IEEE

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A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier

A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier 150 150
Author(s): Yihang Cheng, Yihan Zhang, Huaqiang Wu, Sining Pan

Abstract:

This letter presents an energy-efficient dynamic amplifier. It utilizes source-coupled input boosting and time-domain differential sampling techniques to boost the effective input signal by $4\times $ compared to its floating inverter amplifier (FIA) prototype without noise or power penalties. With discharge-based dynamic biasing, the bandwidth (BW) and power of the amplifier …

Published in: IEEE Solid-State Circuits Letters
Page(s): 93 – 96
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3668876
Publisher: IEEE

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A Multiband Ultralow-Power Transceiver With Two-Step Wake-Up Reception

A Multiband Ultralow-Power Transceiver With Two-Step Wake-Up Reception 150 150
Author(s): Thinh Tran-Dinh, Hafiz Usman Mahmood, Jinglong Xu, Keun-Mok Kim, Kyung-Sik Choi, Jaeheon Lee, Jinho Ko, Sang-Gug Lee, Jusung Kim

Abstract:

This letter presents a multiband fully integrated ultralow-power (ULP) transceiver with a two-step wake-up receiver (WuRX) and switched-capacitor (SC)-based high-efficiency transmitter. Operating from 200 MHz to 1 GHz, the transceiver covers most IoT applications on a single chip. By employing a novel two-step wake-up scheme with a rotating correlator, the proposed …

Published in: IEEE Solid-State Circuits Letters
Page(s): 133 – 136
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3681917
Publisher: IEEE

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A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels

A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels 150 150
Author(s): Sang Weun Kim, Jun Seong Kim, Dabin Yun, Seunghoon Ko

Abstract:

This letter presents a multimode readout IC for 6.5-in 34Tx/16Rx on-cell touch AMOLED (OCTA) panels, detecting both conductive and nonconductive objects (NCos) without panel modifications. To enable this dual detection, a reconfigurable analog front-end (AFE) is proposed, functioning as either a capacitance-to-voltage converter or a triboelectric charge sampler. In …

Published in: IEEE Solid-State Circuits Letters
Page(s): 129 – 132
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3680164
Publisher: IEEE

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A High-Efficiency Magnetoelectric Power Link With a Load-Adaptive CMOS Rectifier for Miniaturized Implants

A High-Efficiency Magnetoelectric Power Link With a Load-Adaptive CMOS Rectifier for Miniaturized Implants 150 150
Author(s): Yasemin Engür, Mingxiang Gao, Niels Kuster, Mahsa Shoaran

Abstract:

Miniaturized biomedical implants are currently constrained by limited wireless power transfer (WPT) efficiency under load variation and spatial misalignment. This work presents a custom magnetoelectric (ME) power link incorporating a load-adaptive CMOS rectifier to address these challenges. By employing a current sensing control loop for dynamic switch sizing and delay …

Published in: IEEE Solid-State Circuits Letters
Page(s): 125 – 128
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3679620
Publisher: IEEE

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