Voltage control

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A 129–146-GHz Direct-Digital Modulation FinFET Transmitter With On-Chip Mismatch Calibrations for Beyond-5G Wireless Communications

A 129–146-GHz Direct-Digital Modulation FinFET Transmitter With On-Chip Mismatch Calibrations for Beyond-5G Wireless Communications 150 150
Author(s): Runzhou Chen, Hao-Yu Chien, Boxun Yan, Chao-Jen Tien, Mau-Chung Frank Chang

Abstract:

This article presents a D-band direct-digital modulation (DDM) transmitter with on-chip digital calibration blocks for future beyond-5G (B5G) wireless communication. The proposed DDM architecture mitigates the need for complex intermediate frequency (IF) generation and power-hungry digital-to-analog converters (DACs). The transmitter is implemented primarily in TSMC’s 16-nm p-FinFETs, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1776 – 1790
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3644224
Publisher: IEEE

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A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks

A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks 150 150
Author(s): Yi Xiang Huang, Y. S. Lin, P. S. Huang, E. Ray Hsieh

Abstract:

This letter presents a 2-transistor (2T) bipolar embedded resistive RAM (eRRAM) MACRO fabricated in a 28-nm high-k metal gate (HKMG) process for multitime programmable (MTP) applications. To overcome the scaling bottlenecks of traditional embedded Flash, this work utilizes an extra-mask-free, pure front-end-of-line (FEOL) integration, offering a robust solution for automotive …

Published in: IEEE Solid-State Circuits Letters
Page(s): 117 – 120
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3675063
Publisher: IEEE

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A Wideband Digitally Assisted Frequency Tripler With Adaptively Optimized Output Power in 55-nm SiGe BiCMOS

A Wideband Digitally Assisted Frequency Tripler With Adaptively Optimized Output Power in 55-nm SiGe BiCMOS 150 150
Author(s): Daniele Lodi Rizzini, Francesco Tesolin, Michele Rossoni, Riccardo Moleri, Filippo Osio, Andrea Mazzanti, Andrea L. Lacaita, Simone M. Dartizio, Salvatore Levantino

Abstract:

This article presents a 28–38-GHz frequency tripler implemented in 55-nm SiGe BiCMOS technology with a novel on-chip background calibration technique. This technique continuously optimizes the circuit performance by maximizing output power and improving fundamental harmonic rejection. The proposed tripler achieves wideband operation and robust performance across varying operating conditions and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1844 – 1859
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3666591
Publisher: IEEE

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A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement

A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement 150 150
Author(s): Xiaguang Li, Qing Miao, Shiheng Yang, Tianting Zhao, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen

Abstract:

This article presents a globally optimized radio frequency (RF) energy harvesting system that leverages the novel concepts of 3-D maximum power point tracking (3-D MPPT) and collaborative source reconfiguration to achieve high MPPT accuracy and a wide input power range. The proposed 3-D MPPT coordinates the energy sources, optimizes the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3662153
Publisher: IEEE

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A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT

A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT 150 150
Author(s): Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui P. Martins, Pui-In Mak

Abstract:

This article presents a power- and area-efficient switched-capacitor (SC) ac–dc converter in low-voltage (LV) CMOS for mains-powered Internet of Things (IoT) applications. The proposed converter adopts a single-stage series-capacitor architecture with fine-grained pre-rectification regulation, eliminating the need for intermediate high-voltage (HV) dc capacitors or HV dc–dc stages, thereby …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3650592
Publisher: IEEE

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A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers

A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers 150 150
Author(s): Chen Hu, Xinran Huang, Xun Liu, Sijun Du, Xiaosen Liu, Junmin Jiang

Abstract:

This article presents a step-up switched-capacitor (SC) sigma converter with fast transient, high efficiency, and high accuracy for light detection and ranging (LiDAR) receiver applications. The proposed sigma converter combines an unregulated SC converter in the high-voltage (HV) domain and a low-dropout (LDO) regulator in the low-voltage (LV) domain, achieving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3645413
Publisher: IEEE

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A 0.015-mm2 0.5-V Synthesizable Hybrid PLL With Multi-Phase Linear Proportional-Gain Paths

A 0.015-mm2 0.5-V Synthesizable Hybrid PLL With Multi-Phase Linear Proportional-Gain Paths 150 150
Author(s): Qibang Sun, Liqun Feng, Woogeun Rhee, Hanjun Jiang

Abstract:

This brief presents a 0.015-mm2 0.5-V synthesizable hybrid phase locked loop (PLL). All blocks including an analog proportional-gain path can be logically or physically synthesized with digital cells and hardware languages. To mitigate the mismatch and common-mode fluctuation problems of a voltage-mode phase detector, multi-phase proportional-gain paths are designed for …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3649215
Publisher: IEEE

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Actiniaria: Distributed Dynamic-IR-Drop-Aware Timing Monitor for AVFS With Lightweight Tentacles

Actiniaria: Distributed Dynamic-IR-Drop-Aware Timing Monitor for AVFS With Lightweight Tentacles 150 150
Author(s): Junyi Qian, Lishuo Deng, Cai Li, Yizhi Ding, Weiwei Shan

Abstract:

Advances in integrated circuit (IC) technology have amplified the effects of process, voltage, and temperature (PVT) variations, particularly dynamic IR drop, which severely affects timing. Post-silicon IR drop monitoring circuits are lacking, forcing designers to reserve substantial static guard bands for worst-case scenarios, compromising energy efficiency. Inspired by biomimetics, this …

Published in: IEEE Solid-State Circuits Letters
Page(s): 25 – 28
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3645701
Publisher: IEEE

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BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator

BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator 150 150
Author(s): Tong Zhang, Yiwen Zhang, Xueke Cai, Weihao Jie, Yanling Zheng, Deyong Li, Yang Zhao, Yongfu Li, Honglan Jiang, Patrick P. Mercier, Hui Wang

Abstract:

This work presents a bandwidth augmented sub-sampling phase-locked loop (BASS-PLL) architecture that features simultaneous out-of-band noise suppression by direct and multipath sampling of the ring oscillator’s (ROs) output and in-band noise suppression via an intrinsic sub-sampling mechanism, ultimately combining the benefits of over-sampling PLLs (OS-PLLs) and sub-sampling PLLs (SS-PLLs) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3640726
Publisher: IEEE

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