System-on-chip

  • No Comments

A High-Efficiency Magnetoelectric Power Link With a Load-Adaptive CMOS Rectifier for Miniaturized Implants

A High-Efficiency Magnetoelectric Power Link With a Load-Adaptive CMOS Rectifier for Miniaturized Implants 150 150
Author(s): Yasemin Engür, Mingxiang Gao, Niels Kuster, Mahsa Shoaran

Abstract:

Miniaturized biomedical implants are currently constrained by limited wireless power transfer (WPT) efficiency under load variation and spatial misalignment. This work presents a custom magnetoelectric (ME) power link incorporating a load-adaptive CMOS rectifier to address these challenges. By employing a current sensing control loop for dynamic switch sizing and delay …

Published in: IEEE Solid-State Circuits Letters
Page(s): 125 – 128
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3679620
Publisher: IEEE

View on IEEE Xplore

  • No Comments

MITTA: A Multi-Task Transformer Accelerator With Mixed Precision Structured Sparsity and Hierarchical Task-Adaptive Power Management

MITTA: A Multi-Task Transformer Accelerator With Mixed Precision Structured Sparsity and Hierarchical Task-Adaptive Power Management 150 150
Author(s): Qirui Zhang, Zichen Fan, Pierre Abillama, Sara Shoouri, Jungho Lee, Chien-Wei Tseng, Changwoo Lee, Wei Meng, Hun-Seok Kim, David Blaauw, Dennis Sylvester

Abstract:

This article presents MITTA, the first silicon-proven transformer accelerator optimized for multi-task inference across both natural language processing (NLP) and image processing domains. MITTA accelerates a task-sharing algorithm that minimizes sub-task computation by reusing both activations and weights from a shared base task, requiring only sparse delta computation for sub-tasks. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3669815
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Birch: A Real-Time Multi-Domain Multi-Task Extended Reality Perception Accelerator

Birch: A Real-Time Multi-Domain Multi-Task Extended Reality Perception Accelerator 150 150
Author(s): Kathleen Feng, Kai Bartolone, Kartik Prabhu, Brianna McColm, Xingyu Ni, Siddhant Gupta, Priyanka Raina

Abstract:

Birch is a system-on-chip (SoC) that efficiently and accurately accelerates the multi-task multi-domain extended reality (XR) perception pipeline, with workloads such as visual inertial odometry (VIO), eye gaze tracking, and scene understanding. Birch features vision modules with cascaded line buffers, in-step feature sorting, and double-buffered optical flow to extract and …

Published in: IEEE Solid-State Circuits Letters
Page(s): 121 – 124
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3673168
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 1.16 e-rms Temporal Random Noise, 123-dB High Dynamic Range, 2.988-μm Pitch 3-Mpixel Three-Stacked Digital Pixel Sensor for Versatile Applications

A 1.16 e-rms Temporal Random Noise, 123-dB High Dynamic Range, 2.988-μm Pitch 3-Mpixel Three-Stacked Digital Pixel Sensor for Versatile Applications 150 150
Author(s): Min-Woong Seo, Yong-Suk Choi, Sanggwon Lee, Yeongseok Shim, Gihwan Cho, Daehee Bae, Masamichi Ito, Jaehun Jeong, Hiroyuki Sugihara, Si-Gyoung Koo, Sung-Jae Byun, Hyukbin Kwon, Youna Lee, Bumjun Kim, Su-Hyun Han, Suksan Kim, Wonoh Ryu, Kwan-Sik Kim, Yongjun Kim, Seung-Sik Kim, Junghoon Jung, Sun-Young Yoo, Jinkyeong Heo, Seung-Chul Shin, Heesung Shim, Jae-Kyu Lee, Jonghyun Go, Jaihyuk Song

Abstract:

This article presents a 3-Mpixel (Mp) three-stacked digital pixel sensor (DPS) featuring the world’s smallest pixel pitch of $2.988~\mu $ m, achieving a low temporal random noise (RN) of 1.16 e-rms and a high dynamic range (HDR) of 123 dB in global-shutter (GS) operation mode for versatile applications. To realize both the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1319 – 1332
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3663214
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 7.5-μW 35-Keyword End-to-End Keyword Spotting System With Random Augmented On-Chip Training

A 7.5-μW 35-Keyword End-to-End Keyword Spotting System With Random Augmented On-Chip Training 150 150
Author(s): Hyuk-Jin Lee, Kyunghoon Pyo, Taekwang Jang, Mingoo Seok, SeongHwan Cho

Abstract:

Fully integrated keyword spotting (KWS) systems designed for low-power operation face two major challenges. First, increasing the number of supported keywords significantly raises system complexity and power consumption. Second, most existing systems are not personalized to individual users, as they are trained on data from native English speakers, leading to …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 10
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3660634
Publisher: IEEE

View on IEEE Xplore

  • No Comments

An Electrophysiology-Optogenetics Closed-Loop Bi-Directional Neural Interface for Sleep Regulation With 0.2-μJ/class Multiplexer-Based Neural Network

An Electrophysiology-Optogenetics Closed-Loop Bi-Directional Neural Interface for Sleep Regulation With 0.2-μJ/class Multiplexer-Based Neural Network 150 150
Author(s): Chao Zhang, Fenyan Zhang, Dawid Sheng, Zhixiong Ma, Yongxiang Guo, Chao Sun, Yuwei Zhang, Wenxin Zhao, Xing Sheng, Tongfei A. Wang, Milin Zhang

Abstract:

This work proposed a multiplexer-based neural network (MUXnet), a multiplexer-based, multiplier-free neural network (NN) structure applicable to the implementation of all inner product-based NN layers. An on-chip MUXnet-based neural signal processing unit (NSPU) was designed, achieving a state-of-the-art accuracy of 82.4% on a public human sleep staging dataset, with the lowest …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3639446
Publisher: IEEE

View on IEEE Xplore

  • No Comments

HUTAO: A Reconfigurable Homomorphic Processing UniT With Cache-Aware Operation Scheduling

HUTAO: A Reconfigurable Homomorphic Processing UniT With Cache-Aware Operation Scheduling 150 150
Author(s): Sijia Lu, Wenping Zhu, Bohan Yang, Jiajun Yang, Tongwei Dai, Chen Chen, Xiangdong Han, Jinjiang Yang, Hanning Wang, Min Zhu, Shaojun Wei, Aoyang Zhang, Leibo Liu

Abstract:

Fully homomorphic encryption (FHE) enables privacy-preserving machine learning (PPML) at the cost of intensive computational overhead, which necessitates the use of domain-specific accelerators. To achieve comprehensive support for leveled FHE, this article presents a reconfigurable multi-scheme FHE processor that supports both client-side encryption/decryption and server-side evaluation. First, a reconfigurable …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3657525
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms

A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms 150 150
Author(s): Javier Diaz-Fortuny, Erik Bury, Robin Degraeve, Ben Kaczer

Abstract:

Ring-oscillator (RO) circuits have historically been used to characterize the performance of CMOS technologies, as they can easily expose both process variability and aging through a straightforward circuit structure. ROs are widely employed to study degradation mechanisms such as bias temperature instability (BTI) and hot carrier degradation (HCD), which progressively …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3653472
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers

Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers 150 150
Author(s): Vinay Chenna, Hossein Hashemi

Abstract:

A topology optimization methodology is presented for the design of multistage, multipath, linear and nonlinear millimeter-wave (mm-Wave) power amplifiers (PAs). Optimization algorithms autonomously generate complete multilayered PA core layouts, including actives and passives, with minimal human intervention in just a few days. Experimental results from fabricated linear and nonlinear W-band …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3656334
Publisher: IEEE

View on IEEE Xplore

Search this website