System-on-chip

Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models

Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models 150 150

Abstract:

Diffusion models have recently revolutionized the field of image synthesis due to their ability to generate photorealistic images. However, one of the main drawbacks of diffusion models is that the image generation process is expensive. Large image-to-image networks have to be applied multiple times in order to iteratively optimize the …

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A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing

A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing 150 150

Abstract:

With the growing demand for energy-efficient convolutional neural network (CNN) accelerators in edge intelligence, conventional digital CNN processors with fixed precision incur excessive switching energy and limited scalability. This work presents a time-domain CNN (TD-CNN) engine that achieves adaptive precision and computation reduction for ultralow-power operation. The main features include: 1) …

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A 6.8–14-GHz Ring-Based Sampling-PLL Achieving 69.3-fs Jitter Under 50-mV Supply Noise

A 6.8–14-GHz Ring-Based Sampling-PLL Achieving 69.3-fs Jitter Under 50-mV Supply Noise 150 150

Abstract:

This article presents a type-III wide-bandwidth ring-oscillator-based analog phase-locked loop (PLL) optimized for low-jitter performance in noisy supply environments. The design uses an 812.5-MHz reference frequency and a high-gain sampling phase detector to achieve a closed-loop bandwidth over 100 MHz, effectively reducing the intrinsic phase noise of the ring oscillator. To …

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A 10.1-ENOB 8kHz Bandwidth 95–250nW PVT-Robust DT Level-Crossing ADC for Sparse and Generic Signals

A 10.1-ENOB 8kHz Bandwidth 95–250nW PVT-Robust DT Level-Crossing ADC for Sparse and Generic Signals 150 150

Abstract:

This article presents an event-driven discrete-time level crossing analog-to-digital converter (DT-LCADC) that is energy-efficient in converting both sparse and generic signals and is robust against process voltage and temperature (PVT) variations. The proposed DT-LCADC uses the comparator delay to classify each level-crossing event as slow (produced by a small input …

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A MEMS-Free 4096-Pixel CMOS E-Nose Array With MOF-Based Molecular Selectivity, In-Pixel Thermal Regeneration, and a Compact Single-Coefficient Bandpass Sigma–Delta ADC

A MEMS-Free 4096-Pixel CMOS E-Nose Array With MOF-Based Molecular Selectivity, In-Pixel Thermal Regeneration, and a Compact Single-Coefficient Bandpass Sigma–Delta ADC 150 150

Abstract:

This work presents a CMOS-only [micro-electromechanical systems (MEMS)-free] electronic nose (e-nose) for concurrent multi-gas-sensing applications. The proposed system integrates 4096 capacitance-to-digital converter (CDC) pixels, each implementing a compact bandpass sigma–delta ( $\Sigma \Delta $ ) ADC with a single feedback coefficient and no additional feedforward or feedback paths, achieving each pixel footprint …

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A 40k-Pixel Multimodal Biophysiology Monitoring Platform With 10k Concurrent Electrophysiology Channels and a Mixer-Embedded ΣΔ Impedance Sensor

A 40k-Pixel Multimodal Biophysiology Monitoring Platform With 10k Concurrent Electrophysiology Channels and a Mixer-Embedded ΣΔ Impedance Sensor 150 150

Abstract:

Understanding complex physiological processes requires the ability to monitor multiple biological modalities concurrently, as electrical, ionic, and biochemical processes are tightly coupled and cannot be holistically described by single-mode sensors. This article presents a 40 nm CMOS multimodal cellular physiology monitoring platform that integrates 40 960 reconfigurable pixels at $10.8~\mu $ m pixel pitch. …

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An 18.3-μW 108.3-dB DR Discrete-Time Delta-Sigma Modulator Using a Loop Filter Auto-Shift Technique

An 18.3-μW 108.3-dB DR Discrete-Time Delta-Sigma Modulator Using a Loop Filter Auto-Shift Technique 150 150

Abstract:

This article presents a discrete-time, third-order, single-loop, 17-level delta-sigma modulator (DSM) for high-dynamic-range sensor measurement applications, which employs a loop filter auto-shift (LFAS) technique. It uses an on-chip 1.5-bit Schmitt monitor to determine whether the input amplitude is large or small. The DSM automatically shifts to loop filter A for …

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A 16-MHz CMOS RC Frequency Reference Achieving Accuracies of ±125 ppm From −40 °C to 85 °C and −560/+580 ppm After Accelerated Aging

A 16-MHz CMOS RC Frequency Reference Achieving Accuracies of ±125 ppm From −40 °C to 85 °C and −560/+580 ppm After Accelerated Aging 150 150

Abstract:

This article presents a low-power, high-accuracy CMOS RC frequency reference featuring a capacitively modulated RC time constant (CMT) generation and a die-to-die error removal (DDER) technique for precise frequency generation with a low-calibration cost. Unlike resistive trimming, the temperature dependence of the on-chip resistor is compensated by a $\Delta \Sigma $ …

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An 800-MS/s 13-b 2× TI Pipelined-SAR ADC With Rapid Digital Amplification

An 800-MS/s 13-b 2× TI Pipelined-SAR ADC With Rapid Digital Amplification 150 150

Abstract:

This work proposes a rapid digital amplification (RDA) with residue-aware reference, offering an equivalent open-loop (OL) gain enhancement of 25 dB and reducing the interstage gain error (ISGE)-induced SNR degradation by 20 dB, with an extra amplification latency of only 200 ps. It is implemented in an 800-MS/s 13-b two-way time-interleaved (…

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