System-on-chip

Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers

Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers 150 150

Abstract:

A topology optimization methodology is presented for the design of multistage, multipath, linear and nonlinear millimeter-wave (mm-Wave) power amplifiers (PAs). Optimization algorithms autonomously generate complete multilayered PA core layouts, including actives and passives, with minimal human intervention in just a few days. Experimental results from fabricated linear and nonlinear W-band …

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On-Chip Charge-Trap-Transistor-Based Mismatch Calibration of an 8-Bit Thermometer Current-Source DAC

On-Chip Charge-Trap-Transistor-Based Mismatch Calibration of an 8-Bit Thermometer Current-Source DAC 150 150

Abstract:

This letter presents an on-chip mismatch calibration technique for current-source digital-to-analog converters (DACs) using charge-trap transistors (CTTs) in 22-nm FDSOI technology. The proposed method exploits programmable threshold voltage (VTH) shifts in CTTs to locally tune the current of near-minimum-sized devices without external trimming. A compact 8-bit thermometer DAC is implemented …

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Chameleon: A Multiplier-Free Temporal Convolutional Network Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data

Chameleon: A Multiplier-Free Temporal Convolutional Network Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data 150 150

Abstract:

On-device learning at the edge enables low-latency, private personalization with improved long-term robustness and reduced maintenance costs. Yet, achieving scalable, low-power (LP) end-to-end on-chip learning, especially from real-world sequential data with a limited number of examples, is an open challenge. Indeed, accelerators supporting error backpropagation optimize for learning performance at …

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An Antenna-to-Bits F-Band 120-Gbps CMOS RF-64QAM Receiver

An Antenna-to-Bits F-Band 120-Gbps CMOS RF-64QAM Receiver 150 150

Abstract:

A CMOS 100–140-GHz end-to-end receiver (RX) is presented that integrates the antenna input all the way to the bitstream output, while demodulating 64QAM/16QAM/QPSK entirely in the analog domain. A sequential asynchronous demodulation method enables 120-Gbps operation at a notably small baseband power consumption. Fabricated in a 22-nm FDSOI …

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A Self-Injection LC Oscillator for Flicker Noise Reduction

A Self-Injection LC Oscillator for Flicker Noise Reduction 150 150

Abstract:

Self-injection has been used in lasers and photonic integrated circuits to reduce the laser’s phase noise (PN). We show that self-injection can be leveraged in GHz LC oscillators as well. Our oscillator employs a current-domain self-injection technique by leveraging second-harmonic extraction, capacitive phase shifting, and self-mixing through the oscillator’…

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Actiniaria: Distributed Dynamic-IR-Drop-Aware Timing Monitor for AVFS With Lightweight Tentacles

Actiniaria: Distributed Dynamic-IR-Drop-Aware Timing Monitor for AVFS With Lightweight Tentacles 150 150

Abstract:

Advances in integrated circuit (IC) technology have amplified the effects of process, voltage, and temperature (PVT) variations, particularly dynamic IR drop, which severely affects timing. Post-silicon IR drop monitoring circuits are lacking, forcing designers to reserve substantial static guard bands for worst-case scenarios, compromising energy efficiency. Inspired by biomimetics, this …

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A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem

A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem 150 150

Abstract:

This work presents a compact digital compute-in-memory (DCIM) Ising annealer targeting large-scale combinatorial optimization. A centroid-based weight mapping method combined with hierarchical clustering reduces the memory capacity required for traveling salesman problem (TSP) weights, enabling efficient mapping with limited on-chip storage. An asynchronous random number generator (ARNG) based on dual …

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An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET

An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET 150 150

Abstract:

The capability to detect small objects precisely in real time is essential for intelligent systems, particularly in advanced driver assistance systems (ADASs), as it ensures continuous awareness of distant obstacles for enhanced safety. However, achieving high detection precision for small objects requires high-resolution input inference on deep convolutional neural network (…

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kNOT: A 2-D Distributed Network-on-Textile Architecture With Direct Die-to-Yarn Integration of 0.6 × 2.15 mm2 SoC and bySPI Chiplets for Wearable Computing

kNOT: A 2-D Distributed Network-on-Textile Architecture With Direct Die-to-Yarn Integration of 0.6 × 2.15 mm2 SoC and bySPI Chiplets for Wearable Computing 150 150

Abstract:

This article presents kNOT, a scalable, distributed, and 2-D Network-On-Textile (kNOT) comprising miniaturized systems on chip (SoCs) and bypass SPI (bySPI) networking chiplets that together enable diverse networking and computational tasks. To preserve garment comfort and flexibility, kNOT eliminates bulky boards and interposers through direct-die attachment to embroidered yarns. The …

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