System-on-chip

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GUARD: A Clock and Voltage Glitch Detector With On-Demand Protection

GUARD: A Clock and Voltage Glitch Detector With On-Demand Protection 150 150
Author(s): Mao Li, Sanu K. Mathew, Vivek De, Mingoo Seok

Abstract:

This article presents GUARD, a fully digital, variation-tolerant detector for clock and voltage glitch attacks, featuring an integrated on-demand protection mechanism. Fabricated in 28-nm CMOS, GUARD provides robust security for digital systems by monitoring the system clock for maliciously injected faults. It employs a pair of optimized time-to-digital converters (TDCs) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3696209
Publisher: IEEE

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OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication

OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication 150 150
Author(s): Shady Agwa, Yihan Pan, Georgios Papandroulidakis, Themis Prodromakis

Abstract:

Artificial intelligence (AI) models are currently driven by a significant upscaling of their complexity, with massive matrix-multiplication workloads representing the major computational bottleneck. In-memory computing (IMC) architectures are proposed to avoid the von Neumann bottleneck. However, both digital/binary-based and analog IMC architectures suffer from various limitations, which significantly degrade …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 56 – 64
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3680281
Publisher: IEEE

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TexCAC: A Direct-Textile-Attachable Microcontroller Integrating 2-MB MRAM for the Command and Control of Advanced Smart Textiles

TexCAC: A Direct-Textile-Attachable Microcontroller Integrating 2-MB MRAM for the Command and Control of Advanced Smart Textiles 150 150
Author(s): Jacob Mack, Qirui Zhang, He Wang, Yi Shen, Jeongtaek Chang, Heejin Yang, Anjali Agrawal, Zichen Fan, Braden Desman, Zane Lewis, Thomas Farrell, David Blaauw, Will Farrell, Jim Owens, Benton H. Calhoun, Dennis Sylvester

Abstract:

Advanced smart textiles (ASTs) are textile-integrated electronic systems that enable many applications, including healthcare, robotics, and IoT. ASTs contain a variety of electronic components to enable whole system functionality (batteries, sensors, SoCs, etc.), which all require orchestration from a central command-and-control (CAC) module. The primary functions of the CAC module …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 10
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695482
Publisher: IEEE

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A BEV Perception Transformer Accelerator With Saliency-Driven Image/Point Cloud Fusion and Phase-Linked Dataflow in 28 nm CMOS

A BEV Perception Transformer Accelerator With Saliency-Driven Image/Point Cloud Fusion and Phase-Linked Dataflow in 28 nm CMOS 150 150
Author(s): Junyi Qian, Yuncheng Lu, Zhangrui Qian, Lishuo Deng, Zhihao Yan, Cai Li, Tony Tae-Hyoung Kim, Weiwei Shan

Abstract:

Deploying advanced Transformer-based models for real-time, high-accuracy multimodal bird’s-eye-view (BEV) perception in autonomous driving imposes substantial hardware demands. To address this, we propose a low-cost, low-power image/point-cloud fusion Transformer accelerator that supports two modes: high-performance driving and ultra-low-power sentry operation. We first propose a cross-modal saliency evaluation mechanism …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3691770
Publisher: IEEE

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A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation 150 150
Author(s): Wei-Chun Wang, Shida Zhang, Coleman DeLude, Laith Shamieh, Nael Mizanur Rahman, Isha Chakraborty, Justin Romberg, Saibal Mukhopadhyay

Abstract:

An analog compute-in-memory (CIM) Slepian beamforming (SBF) accelerator is introduced for large-scale multi-input–multi-output (MIMO). The design performs complex-valued vector–matrix multiplication in the analog domain to project 256 I/Q inputs into a low-dimensional Slepian subspace and uses a digital backend with 4-tap FIR filters to generate one output beam. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 154 – 157
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690381
Publisher: IEEE

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A CMOS Probabilistic Computing Chip With Hardware-Aware Learning

A CMOS Probabilistic Computing Chip With Hardware-Aware Learning 150 150
Author(s): Jinesh Jhonsa, William Whitehead, Yihao Wu, David Mccarthy, Shuvro Chowdhury, Kerem Y. Camsari, Luke Theogarajan

Abstract:

This work demonstrates a compact probabilistic computing system based on a physics-inspired probabilistic bit (p-bit) architecture with 440 interacting spins configured in a chimera graph and occupying 0.44 mm2 of silicon area. Area efficiency is achieved through a current-mode neuron update circuit and a mixed-signal design approach that integrates pitch-matched standard-cell analog …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 86 – 94
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3689506
Publisher: IEEE

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HyFPCiM: A 65-nm 417-μW Error-Sensitivity-Aware FP8 Compute-in-Memory Macro

HyFPCiM: A 65-nm 417-μW Error-Sensitivity-Aware FP8 Compute-in-Memory Macro 150 150
Author(s): Gaurav Kumar K, Yatharth Agarwal, Kaushik Roy

Abstract:

This letter presents HyFPCiM, a 65-nm FP8 compute-in-memory (CiM) macro that enables sub-mW floating-point (FP) inference using error-sensitivity-aware FP partitioning (EAP). EAP maps exponent processing to a digital CiM (DCiM) path and mantissa accumulation to an analog CiM (ACiM), avoiding the power- and area-intensive adder-tree-based accumulation used in prior FP-CiM …

Published in: IEEE Solid-State Circuits Letters
Page(s): 146 – 149
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3688988
Publisher: IEEE

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Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models

Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models 150 150
Author(s): Ruiqi Guo, Lei Wang, Xiaofeng Chen, Keyi Jiang, Zhiheng Yue, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu, Shouyi Yin

Abstract:

Diffusion models have recently revolutionized the field of image synthesis due to their ability to generate photorealistic images. However, one of the main drawbacks of diffusion models is that the image generation process is expensive. Large image-to-image networks have to be applied multiple times in order to iteratively optimize the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3684745
Publisher: IEEE

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A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing

A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing 150 150
Author(s): Aoming Zhan, Ye Zhao, Yulin Zhang, Gengchen Han, Qihang Jiang, Long Chen, Yumei Zhou, Shushan Qiao

Abstract:

With the growing demand for energy-efficient convolutional neural network (CNN) accelerators in edge intelligence, conventional digital CNN processors with fixed precision incur excessive switching energy and limited scalability. This work presents a time-domain CNN (TD-CNN) engine that achieves adaptive precision and computation reduction for ultralow-power operation. The main features include: 1) …

Published in: IEEE Solid-State Circuits Letters
Page(s): 142 – 145
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3687395
Publisher: IEEE

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