Radio frequency

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A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI 150 150
Author(s): Haisu Ju, Yingtao Zou, Gabriel M. Rebeiz

Abstract:

This article presents a 6.3–18.4GHz in-phase and quadrature (I/Q) direct down-conversion receiver featuring reconfigurability in both the radio frequency (RF) and local oscillator (LO) paths. The receiver comprises a multi-band reconfigurable RF front-end, double-balanced passive I/Q mixers, an I/Q LO generation network with a tunable I/Q …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698025
Publisher: IEEE

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A Ka-Band Time-Modulated Phase-Invariant Variable-Gain Amplifier With 30-dB Gain Tuning Based on Duty-Cycle Control

A Ka-Band Time-Modulated Phase-Invariant Variable-Gain Amplifier With 30-dB Gain Tuning Based on Duty-Cycle Control 150 150
Author(s): Dongfan Xu, Minzhe Tang, Haiyun Gu, Yuxuan Liu, Yilun Chen, Ziyuan Ren, Minghao Fan, Daxu Zhang, Yi Zhang, Duo Li, Zheng Li, Zezheng Liu, Chun Wang, Yudai Yamazaki, Yuncheng Zhang, Kazuaki Kunihiro, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada

Abstract:

This article presents a time-modulated variable-gain amplifier (VGA) employing a clock-sampling topology governed by a duty-cycle control (DCC) loop. By modulating the effective operation time of the amplifier rather than altering its RF bias conditions, for precise tuning of the clock duty cycle, enabling phase consistency at millimeter-wave frequencies. The …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695362
Publisher: IEEE

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An IEEE802.15.4a/z/ab compatible IR-UWB 2TRX with full-duplex radar sensing and aliasing suppressing semi-synchronous TX

An IEEE802.15.4a/z/ab compatible IR-UWB 2TRX with full-duplex radar sensing and aliasing suppressing semi-synchronous TX 150 150
Author(s): Anoop Narayan Bhat, Erwin Allebes, Elbert Bechthum, Zule Xu, Stan Van Der Ven, Mohieddine El Soussi, Johan Van Den Heuvel, Paul Van Zeijl, Paul Mateman, Murat Eskiyerli, Stefano Traferro, Amirashkan Farsaei, Evgenii Tiurin, Sahan Gamage, Pepijn Boer, Igor Petrov, Jochem Govers, Huib Visser, Martijn Hijdra, Sharada Prasad Shantharam, Ivo Marques, Gururaja Kasanadi Ramachandra, Kaijie Ding, Ran Li, Aasish Boora, Peter Vis, Mario Konijnenburg, Arjan Breeschoten, Peng Zhang, Yao-Hong Liu, Christian Bachmann

Abstract:

This letter presents an 802.15.4ab/a/z compatible IR-UWB 2TRX highlighting a full-duplex-based radar, a semi-synchronous TX and TRX’s digital baseband. A capacitive tuning technique proposed in the electrical balance duplexer (EBD)-based duplex RF front-end (RF-FE) improves TX-antenna insertion loss by 1.4dB and the sensitivity of TX-RX isolation …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3697493
Publisher: IEEE

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A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G

A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G 150 150
Author(s): Minzhe Tang, Dongfan Xu, Yi Zhang, Yuxuan Liu, Zheng Li, Yuncheng Zhang, Yilun Chen, Minghao Fan, Ziyuan Ren, Jian Pang, Dingxin Xu, Chenxin Liu, Daxu Zhang, Duo Li, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This article presents a Ka-band phased-array multiple-input multiple-output (MIMO) receiver for sixth-generation (6G) wireless networks. A time-division (TD) MIMO architecture is combined with DP antenna array to support eight MIMO streams in the Ka band. The complex weights of each RF element in both polarization arrays are sequentially switched at …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 21
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695546
Publisher: IEEE

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Birch: A Real-Time Multi-Domain Multi-Task Extended Reality Perception Accelerator

Birch: A Real-Time Multi-Domain Multi-Task Extended Reality Perception Accelerator 150 150
Author(s): Kathleen Feng, Kai Bartolone, Kartik Prabhu, Brianna McColm, Xingyu Ni, Siddhant Gupta, Priyanka Raina

Abstract:

Birch is a system-on-chip (SoC) that efficiently and accurately accelerates the multi-task multi-domain extended reality (XR) perception pipeline, with workloads such as visual inertial odometry (VIO), eye gaze tracking, and scene understanding. Birch features vision modules with cascaded line buffers, in-step feature sorting, and double-buffered optical flow to extract and …

Published in: IEEE Solid-State Circuits Letters
Page(s): 121 – 124
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3673168
Publisher: IEEE

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A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement

A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement 150 150
Author(s): Xiaguang Li, Qing Miao, Shiheng Yang, Tianting Zhao, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen

Abstract:

This article presents a globally optimized radio frequency (RF) energy harvesting system that leverages the novel concepts of 3-D maximum power point tracking (3-D MPPT) and collaborative source reconfiguration to achieve high MPPT accuracy and a wide input power range. The proposed 3-D MPPT coordinates the energy sources, optimizes the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3662153
Publisher: IEEE

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0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis

0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis 150 150
Author(s): Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Yuhao Yuan, Qun Jane Gu

Abstract:

This article presents a new system design and in-depth analysis of a wideband, low-power passive imaging receiver based on a Dicke-switch architecture, implemented in 28 nm CMOS technology. The proposed structure employs a three-coil gm-boosting technique for the low-noise amplifier (LNA). This approach reduces the LNA’s noise figure (NF) and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 830 – 846
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3646943
Publisher: IEEE

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A 136.6-dB-DR 174.3-dB-FoMS Versatile Current-to-Digital Converter With a Truncated-Noise-Shaped Baseline-Servo-Loop

A 136.6-dB-DR 174.3-dB-FoMS Versatile Current-to-Digital Converter With a Truncated-Noise-Shaped Baseline-Servo-Loop 150 150
Author(s): Taeryoung Seol, Sehwan Lee, Geunha Kim, Samhwan Kim, Yeonjae Shin, Jeongyoon Wie, Seungyeob Baik, Hongki Kang, Minyoung Song, Jong-Hyeok Yoon, Junghyup Lee

Abstract:

This article presents a high-resolution, wide dynamic-range (DR) current-to-digital converter (IDC) capable of directly digitizing a broad range of bio-current signals. To achieve high resolution, the IDC uses a second-order continuous-time delta–sigma modulator (CT-DSM) architecture with a low-noise current-recycling operational amplifier (op-amp) and a highly linear pseudo-differential voltage-controlled oscillator (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3653442
Publisher: IEEE

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A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer

A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer 150 150
Author(s): Zhengqi Xu, Zhiyuan Zhao, Michael A. Laun, Coleman DeLude, Justin Romberg, Michael P. Flynn

Abstract:

This article introduces a hybrid Slepian beamforming receiver architecture with low power and area costs. Traditional large-scale true-time-delay (TTD) beamformers for wideband wireless communication suffer from high power consumption and high hardware costs. As an alternative, the Slepian beamforming approach reduces the number of analog-to-digital conversions (ADCs) and delays for …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3651452
Publisher: IEEE

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