Nonvolatile memory

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A Multicore Programmable Variable-Precision Near-Memory Accelerator for CNN and Transformer Models

A Multicore Programmable Variable-Precision Near-Memory Accelerator for CNN and Transformer Models 150 150
Author(s): Yiming Yang, Yiyang Yuan, Xinghua Wang, Xiaoran Li, Hao Wu, Qihao Liu, Weiye Tang, Xiangqu Fu, Feng Zhang

Abstract:

Convolutional neural network (CNN) and transformer are the most popular neural network models in computer vision (CV) and natural language processing (NLP). It is quite common to use both these two models in multimodal scenarios, such as text-to-image generation. However, these two models have very different memory mappings, dataflows and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624011
Publisher: IEEE

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Energy-efficient Logic-in-memory and Neuromorphic Computing in RSD MOSFETs

Energy-efficient Logic-in-memory and Neuromorphic Computing in RSD MOSFETs 150 150
Author(s): Md. Hasan Raza Ansari, Bashayr Alqahtani, Naveen Kumar, Vihar Georgiev, Nazek El-Atab

Abstract:

This work highlights the potential application of raised source and drain (RSD) MOSFETs-based charge trapping memory (CTM) for next-generation computing applications. This simulation study presents a double gate (DG)-RSD MOSFET technology with a short gate length (50 nm) to significantly improve the performance of logic-in-memory (LIM) and neuromorphic computing (NC) …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3630217
Publisher: IEEE

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Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs 150 150
Author(s): Sadik Yasir Tauki, Rudra Biswas, Rakesh Acharya, Jiahui Duan, Rajiv Joshi, Kai Ni, Vijaykrishnan Narayanan

Abstract:

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 148 – 156
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3619908
Publisher: IEEE

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Benchmarking of FERAM-Based Memory System by Optimizing Ferroelectric Device Model

Benchmarking of FERAM-Based Memory System by Optimizing Ferroelectric Device Model 150 150
Author(s): Mohammad Adnaan, Saeideh Alinezhad Chamazcoti, Emil Karimov, Marie Garcia Bardon, Francky Catthoor, Jan van Houdt, Azad Naeemi

Abstract:

We present a framework for design technology co-optimization (DTCO) of the main memory system with one transistor-one capacitor (1T1C) ferroelectric random access memory (FERAM) as an alternative to dynamic random access memory (DRAM). We start with the ferroelectric capacitor device model and perform array-level memory circuit simulation. Then, we …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 99 – 106
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3618883
Publisher: IEEE

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Reference-Load Sharing Scheme: An Area- and Energy-Efficient Nonvolatile Register Design Using MTJ Devices

Reference-Load Sharing Scheme: An Area- and Energy-Efficient Nonvolatile Register Design Using MTJ Devices 150 150
Author(s): Masanori Natsui, Tomoo Yoshida, Takahiro Hanyu

Abstract:

This article proposes a circuit configuration for an area- and energy-efficient nonvolatile register using magnetic tunnel junction (MTJ) devices, suitable for persistent computation in intermittent computing environments. The proposed configuration, named the reference-load sharing scheme (RLSS), stores 1 bit of information using the resistance of a dedicated MTJ device and a …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 90 – 98
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3611365
Publisher: IEEE

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Cryogenic Hyperdimensional In-Memory Computing Using Ferroelectric TCAM

Cryogenic Hyperdimensional In-Memory Computing Using Ferroelectric TCAM 150 150
Author(s): Shivendra Singh Parihar, Shubham Kumar, Swetaki Chatterjee, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch

Abstract:

Cryogenic operations of electronics present a significant step forward to achieve huge demand of in-memory computing (IMC) for high-performance computing, quantum computing, and military applications. Ferroelectric (FE) is a promising candidate to develop the complementary metal oxide semiconductor (CMOS)-compatible nonvolatile memories. Hence, in this work, we investigate the effectiveness …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 34 – 41
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3547797
Publisher: IEEE

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