Noise

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A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver

A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver 150 150
Author(s): Yihao Yang, Dan Li, Nan Qi, Binhao Wang

Abstract:

This letter describes an ultra-low-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3584266
Publisher: IEEE

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A 10.9nV/√Hz, 74.9dB-DR, 20MS/s Ultrasound Analog Front End for Fully-Digital Beamforming

A 10.9nV/√Hz, 74.9dB-DR, 20MS/s Ultrasound Analog Front End for Fully-Digital Beamforming 150 150
Author(s): Changde Ding, Yan Zhu, Pengjie Wang, Zhiliang Hong, Jiawei Xu

Abstract:

This letter presents a compact and energy-efficient analog front-end (AFE) circuit for fully-digital beamforming in endoscopic and catheter-based 3D-ultrasound imaging. The AFE converts single-ended analog input from each transducer element into a 10-bit digital output through a low-noise amplifier (LNA) and a 20 MS/s SAR ADC. To minimize chip area …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3581584
Publisher: IEEE

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A 45-V Auto-Zero-Stabilized Chopper Instrumentation Amplifier With 1.8- μ V Offset, 33.5- μ V Ripple, and 42-V Common-Mode Input Range

A 45-V Auto-Zero-Stabilized Chopper Instrumentation Amplifier With 1.8- μ V Offset, 33.5- μ V Ripple, and 42-V Common-Mode Input Range 150 150
Author(s): Jiahao Wang, Shen Ye, Shiqi Zhang, Zhiliang Hong, Jiawei Xu

Abstract:

This letter presents a 45V high-precision current-feedback instrumentation amplifier (CFIA) that combines both chopping and auto-zeroing (AZ) to achieve 1.8- $mu $ V input offset (10 samples) and 33.5- $mu $ V input-referred ripple. The AZ is duty cycled to minimize power and silicon area, with a parallel auxiliary path operating during AZ …

Published in: IEEE Solid-State Circuits Letters
Page(s): 173 – 176
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3576393
Publisher: IEEE

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An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K

An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K 150 150
Author(s): Hafeez Raza, Shivendra Singh Parihar, Yogesh Singh Chauhan, Hussam Amrouch, Avinash Lahgere

Abstract:

In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum operating voltage ( $V_{min }$ ) of 5-nm Fin Field-Effect Transistors (FinFETs)-based Static Random Access Memory (SRAM) cells. To perform the SRAM $V_{min }$ evaluation, we have measured the FinFETs fabricated using a commercial 5…

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 42 – 50
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3560215
Publisher: IEEE

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A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique

A 9-GHz Low-In-Band Noise Sub-Sampling-Chopper PLL With Charge-Share Canceling Technique 150 150
Author(s): Xiangjian Kong, Kai Xu, Huanlin Xie, Mingchao Jian, Hao Lian, Robert Bogdan Staszewski, Chunbing Guo

Abstract:

This article presents a low-jitter sub-sampling chopper phase-locked loop (SS-CPLL) that incorporates a novel chopping charge pump (C-CP) to mitigate 1/f noise in short-channel devices operating at a low supply voltage of 0.75 V. A charge-share cancellation technique is introduced to suppress ripple generated by residual charge from the previous reference …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1384 – 1396
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3532504
Publisher: IEEE

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A 430- μ A 68.2-dB-SNR 133-dBSPL-AOP CMOS-MEMS Digital Microphone Based on Electrostatic Force Feedback Control

A 430- μ A 68.2-dB-SNR 133-dBSPL-AOP CMOS-MEMS Digital Microphone Based on Electrostatic Force Feedback Control 150 150
Author(s): Jiaqi Dong, Qi Zhang, Xinwen Zhang, Yekan Chen, Yili Shen, Bo Zhao, Yuxuan Luo

Abstract:

This article introduces a high-acoustic-dynamic-range and low-power digital microphone based on the electrostatic force feedback control (EFFC). The proposed design adjusts the sensitivity of the micro-electro-mechanical system (MEMS) by adaptively biasing it at different input amplitudes, thereby extending the dynamic range (DR). The proposed adaptive biasing technique allows the induced …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1199 – 1209
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3531509
Publisher: IEEE

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