Error correction codes

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Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro
Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro 150 150
Author(s): Bastien Giraud, Sebastien Ricavy, Cyrille Laffond, Ilan Sever, Valentin Gherman, Florent Lepin, Mariam Diallo, Khadija Zenati, Sylvain Dumas, Olivier Guille, Maxim Vershkov, Alessandro Bricalli, Giuseppe Piccolboni, Jean-Philippe Noel, Anass Samir, Gaël Pillonnet, Yvain Thonnart, Gabriel Molas

Abstract:

This article presents a comprehensive assessment of the impact of various design assist techniques on the inherent performance and reliability of native resistive RAM (RRAM) on silicon. The collaborative optimization of design and technology plays a crucial role in replacing conventional flash memory as the leading solution. We showcase that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2024
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2024.3386429
Publisher: IEEE

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OCCAM: An Error Oblivious CAM
OCCAM: An Error Oblivious CAM 150 150
Author(s): Yuval Harary, Paz Snapir, Eyal Reshef, Esteban Garzón, Leonid Yavits

Abstract:

Content addressable memories (CAMs) are widely used in many applications in general purpose computer microarchitecture, networking and domain-specific hardware accelerators. In addition to storing and reading data, CAMs enable simultaneous compare of query datawords with the entire memory content. Similar to SRAM and DRAM, CAMs are prone to errors and …

Published in: IEEE Solid-State Circuits Letters
Page(s): 82 – 85
Year of Publication: 2024
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2024.3362891
Publisher: IEEE

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