Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures – An SSCS Open Journal Webinar

Online

Presented by Saion K. Roy and Naresh R. Shanbhag 2:00 PM ET / 11:00 AM PT Register here: https://ieee.webex.com/weblink/register/raaeddf34787775fb1795d83390102fde Abstract: Resistive in-memory computing (IMC) architectures currently lag behind SRAM IMCs and digital accelerators in both energy efficiency and compute density due to their low compute accuracy. To understand the reasons underlying this trend, we develop […]

Networking Bingo @ ISSCC 2025

San Francisco Marriott Marquis - SoMa Room 780 Mission St, San Francisco, CA, United States

Join us for a peer-to-peer networking event aimed to help connect emerging engineers and scientists with the wider community. Are you new to networking & want to get a head start? Does networking feel like a puzzle to solve? Open to everyone!

Free HeadShot Session @ ISSCC 2025

San Francisco Marriott Marquis - Willow Room

Join us at the SSCS Member Lounge for a free professional headshot! Each person will be provided with 1 free headshot.

Young Professionals Micro-Mentoring Event @ ISSCC 2025

San Francisco Marriott Marquis - SoMa Room 780 Mission St, San Francisco, CA, United States

Join other Young Professionals & Students for a Micro-Mentoring Session at ISSCC. Room: SoMa Get advice from leading industry experts and professors Open to all conference attendees where you can ask questions in a relaxed atmosphere Meet with fellow young professionals and students Refreshments included! Open to everyone!

Design Exciting Chips in the Classroom, Presented By: Prof. Bora Nikolic, Hosted by SSCS Young Professionals & Women in Circuits

Online

Abstract: There is an enormous interest in developing customized, domain-specific systems-on-a-chip (SoC). Continued improvement in computing efficiency requires functional specialization of hardware designs. But designing complex chips is difficult, and therefore there is a large barrier to designing them in academic teaching or research environments. This talk presents the Chipyard framework, an integrated SoC design, […]