Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures – An SSCS Open Journal Webinar
OnlinePresented by Saion K. Roy and Naresh R. Shanbhag 2:00 PM ET / 11:00 AM PT Register here: https://ieee.webex.com/weblink/register/raaeddf34787775fb1795d83390102fde Abstract: Resistive in-memory computing (IMC) architectures currently lag behind SRAM IMCs and digital accelerators in both energy efficiency and compute density due to their low compute accuracy. To understand the reasons underlying this trend, we develop […]