IEEE Fellows Program

The IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. A brief citation is issued to new Fellows describing their accomplishments and the total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Complete Program Information about the IEEE Fellows Program may be found here.  The Fellow Nomination Process is described here. A Senior member can be nominated in one of four categories: application engineer/practitioner, educator, research engineer/scientist or technical leader. 

The full list of Solid-State Circuits Society Members who are IEEE Fellows are listed here


The 2019 Fellow Evaluation Committee for the elevation of the 2020 Class of Fellows via the Solid-State Circuits Society is as follows: 

SSCS Fellows Committee Chair: 

Richard (Dick) Jaeger

rj - at- 

Committee Members:

Bruce Woooley

Rinaldo Castello

Ichiro Fujimori

Shanthi Pavan

Willy Sansen

Katsu Nakamura

Zhihua Wang

Wanda Gass



SSCS Members Elevated to Fellow in 2019

Figure 1 fellows

 SSCS President Bram Nauta (far left) with 2019 IEEE Fellows who received their recognition at ISSCC 2019 


108 alon eladElad Alon

for contributions to mixed-signal integrated circuit design and methodology


Elad Alon is a Professor of Electrical Engineering and Computer Sciences at the University of California at Berkeley, as well as a co-director of the Berkeley Wireless Research Center (BWRC). He has held advisory, consulting, or visiting positions at Ayar Labs, Locix, Lion Semiconductor, Cadence, Xilinx, Wilocity (now Qualcomm), Oracle, Intel, AMD, Rambus, Hewlett Packard, and IBM Research, where he worked on digital, analog, and mixed-signal integrated circuits for computing, test and measurement, power management, and high-speed communications. His research focuses on energy-efficient integrated systems, including the circuit, device, communications, and optimization techniques used to design them. Prof. Alon received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from Stanford University in 2001, 2002, and 2006, respectively.  He received the IBM Faculty Award in 2008, the 2009 Hellman Family Faculty Fund Award, as well as the 2010 and 2017 UC Berkeley Electrical Engineering Outstanding Teaching Awards, and has co-authored papers that received the 2010 ISSCC Jack Raper Award for Outstanding Technology Directions Paper, the 2011 Symposium on VLSI Circuits Best Student Paper Award, the 2012 as well as the 2013 Custom Integrated Circuits Conference Best Student Paper Awards, and 2010-2016 Symposium on VLSI Circuits Most Frequently Cited Paper Award. 

Lucien Breems

Lucien Breems

for contributions to over-sampled converters using complementary metal-oxide-semiconductor technology


Lucien J. Breems received the M.Sc. degree (cum laude) and the Ph.D. degree in Electrical Engineering from the Delft University of Technology, The Netherlands, in 1996 and 2001 respectively. 

From 2000 to 2006 he was with Philips Research and in 2007 he joined NXP Semiconductors. He is NXP fellow and technical director in business line Car Infotainment and Driver Assistance. Since 2011 he is a part-time professor at the Technical University of Eindhoven. 
Prof. Breems is/has been a member of the technical program committees of the International Solid-State Circuits Conference (ISSCC), European Solid-State Circuits Conference (ESSCIRC), the Symposium on VLSI Circuits and the IEEE International Symposium on Low Power Electronics and Design (ISLPED). From 2009 to 2015 he has served as Associate Editor of the IEEE Journal of Solid-Sate Circuits and he has been Guest Editor of the IEEE Transactions on Circuits and Systems-II (2008-2009). He received the ISSCC “Jan van Vessem Outstanding European Paper Award” in 2001, 2011 and 2016, the RFIC Symposium Industry Best Paper award in 2016, and the IEEE Journal of Solid-State Circuits best paper award in 2011 and 2016. He has been IEEE Distinguished Lecturer in 2012-2013.

Meng Fan Chang

Meng-fan Chang

for contributions to static and nonvolatile memories for embedded systems


Meng-Fan Chang received the M.S. degree from The Pennsylvania State University, US, and the Ph.D. degree from the National Chiao Tung University, Hisnchu, Taiwan, respectively. Currently, he is a Full Professor at National Tsing Hua University (NTHU), Taiwan. Before 2006, he has worked in industry over 10 years.

From 1996 to 1997, he designed memory compilers in Mentor Graphics, New Jersey, US. From 1997 to 2001, he designed embedded SRAMs and Flash in Design Service Division (DSD) at TSMC, Hsinchu, Taiwan. During 2001–2006, he was a co-founder and a Director in IPLib Company, Taiwan, where he developed embedded SRAM and ROM compilers, Flash macros, and Flat-cell ROM products. His research interests include circuit designs for volatile and nonvolatile memory, ultra-low-voltage systems, 3D-memory, circuit-device interactions, spintronics circuits, memristor logics for neuromorphic computing, and computing-in-memory for Artificial Intelligence.    


Dr. Chang has been serving as an associate editor for IEEE TVLSI, IEEE TCAD. and a guest editor of IEEE JSSC. He has been serving on technical program committees for ISSCC, IEDM (Ex-com and MT chair), DAC (sub-com chair), ISCAS (track co-chair), A-SSCC, and numerous international conferences. He has been a Distinguished Lecture (DL) speaker for IEEE Circuits and Systems Society (CASS), technical committee member of CASS, and the administrative committee (AdCom) member of IEEE Nanotechnology Council. He has also been serving as the Program Director of Micro-Electronics Program of Ministry of Since and Technology (MOST) in Taiwan during 2018-2020, Associate Executive Director for Taiwan’s National Program of Intelligent Electronics (NPIE) and NPIE bridge program during 2011-2018. He is the recipient of several prestigious national-level awards in Taiwan, including the Outstanding Research Award of MOST-Taiwan (2018), Outstanding Electrical Engineering Professor Award (2017), Academia Sinica Junior Research Investigators Award (2012) and Ta-You Wu Memorial Award (2011). He is an IEEE Fellow. 

Christian Enzphoto enz 45x35mm


for contributions to low-power analog circuit design


Christian C. Enz (M’84, S'12) received the M.S. and Ph.D. degrees in Electrical Engineering from the EPFL in 1984 and 1989 respectively. From 1984 to 1989 he was research assistant at the EPFL, working in the field of micro-power analog IC design. In 1989 he was one of the founders of Smart Silicon Systems S.A. (S3), where he developed several low-noise and low-power ICs, mainly for high energy physics applications. From 1992 to 1997, he was an Assistant Professor at EPFL, working in the field of low-power analog CMOS and BiCMOS IC design and device modeling. From 1997 to 1999, he was Principal Senior Engineer at Conexant (formerly Rockwell Semiconductor Systems), Newport Beach, CA, where he was responsible for the modeling and characterization of MOS transistors for the design of RF CMOS circuits. In 1999, he joined the Swiss Center for Electronics and Microtechnology (CSEM) where he launched and lead the RF and Analog IC Design group. In 2000, he was promoted Vice President, heading the Microelectronics Department, which became the Integrated and Wireless Systems Division in 2009. He joined the EPFL as full professor in 2013, where he is currently the director of the Institute of Microengineering (IMT) and head of the Integrated Circuits Laboratory (ICLAB).

He is lecturing and supervising undergraduate and graduate students in the field of Analog and RF IC Design at EPFL. His technical interests and expertise are in the field of very low-power analog and RF IC design, semiconductor device modeling, and inexact and error tolerant circuits and systems.

He has published more than 200 scientific papers and has contributed to numerous conference presentations and advanced engineering courses. Together with E. Vittoz and F. Krummenacher he is one of the developer of the EKV MOS transistor model and the author of the book "Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design" (Wiley, 2006). He has been member of several technical program committees, including the International Solid-State Circuits Conference (ISSCC) and European Solid-State Circuits Conference (ESSCIRC). He has served as a vice-chair for the 2000 International Symposium on Low Power Electronics and Design (ISLPED), exhibit chair for the 2000 International Symposium on Circuits and Systems (ISCAS) and chair of the technical program committee for the 2006 European Solid-State Circuits Conference (ESSCIRC). Since 2012 he has been elected as member of the IEEE Solid-State Circuits Society (SSCS) Administrative Commmittee (AdCom). He is also Chair of the IEEE SSCS Chapter of Switzerland.

Maysam Ghovanloo ECEMaysam Ghovanloo

for contributions to implantable wireless integrated circuits and systems


Maysam Ghovanloo received the B.S. degree in electrical engineering from the University of Tehran, and the M.S. degree in biomedical engineering from the Amirkabir University of Technology, Tehran, Iran in 1997. He also received the M.S. and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, in 2003 and 2004.

Dr. Ghovanloo developed the first modular Patient Care Monitoring System in Iran where he also founded a startup to manufacture physiology and pharmacology research laboratory instruments. From 2004 to 2007 he was an Assistant Professor in the Department of ECE at the North Carolina State University, Raleigh, NC. Since 2007 he has been with the Georgia Institute of Technology, School of Electrical and Computer Engineering, where he is a Professor and the founding director of the GT-Bionics Lab. He has 10 issued patents and authored or coauthored more than 200 peer-reviewed conference and journal publications on implantable microelectronic devices, integrated circuits and micro-systems for IMD applications, and modern assistive technologies.


Dr. Ghovanloo was the general chair of the IEEE Biomedical Circuits and Systems (BioCAS 2015) in Atlanta, GA in Oct. 2015. He is an Associate Editor of the IEEE Transactions on Biomedical Engineering (TBME) and IEEE Transactions on Biomedical Circuits and Systems (TBioCAS). He is serving on the technical program committee for the IEEE Custom Integrated Circuits Conference (CICC). He served as an Associate Editor of IEEE Transactions on Circuits and Systems, Part II (2008-2011), as well as a Guest Editor for the IEEE Journal of Solid-State Circuits and IEEE Transactions on Neural Systems and Rehabilitation Engineering. He has also served on the Imagers, MEMS, Medical and Displays subcommittee of the International Solid-State Circuits Conference (ISSCC) from 2009-2014. He has received the National Science Foundation CAREER Award, the Tommy Nobis Barrier Breaker Award for Innovation, and Distinguished Young Scholar Award from the Association of Professors and Scholars of Iranian Heritage.

Hossein Hashemi High ResolutionHossein Hashemi

for development of radio-frequency and optical phased-array integrated circuits


Hossein Hashemi is a Professor of Electrical Engineering, Ming Hsieh Faculty Fellow, and the co-director of the Ming Hsieh Institute at the University of Southern California. His research interests include electronic and photonic integrated circuits and systems. He received the B.S. and M.S. degrees in Electronics Engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in Electrical Engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. He is an Associate Editor for the IEEE Journal of Solid state Circuits (2013 – present). He was a Distinguished Lecturer for the IEEE Solid-State Circuits Society (2013 – 2014); member of the Technical Program Committee of IEEE International Solid-State Circuits Conference (ISSCC) (2011 – 2015), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium (2011 – present), and the IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS) (2010 – 2014); an Associate Editor for the IEEE Transactions on Circuits and Systems—Part I: Regular Papers (2006–2007) and the IEEE Transactions on Circuits and Systems—Part II: Express Briefs (2004–2005); and Guest Editor for the IEEE Journal of Solid state Circuits (Oct 2013 & Dec 2013).

Dr. Hashemi was the recipient of a 2018 Okawa Foundation Research Award, the 2016 Nokia Bell Labs Prize, 2015 IEEE Microwave Theory and Techniques Society (MTT-S) Outstanding Young Engineer Award, 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, and a National Science Foundation (NSF) CAREER Award. He received the USC Viterbi School of Engineering Junior Faculty Research Award in 2008, and was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage in 2011. He was a co-recipient of the 2004 IEEE Journal of Solid-State Circuits Best Paper Award for “A Fully-Integrated 24 GHz 8-Element Phased-Array Receiver in Silicon” and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper for “A Fully Integrated 24 GHz 4-Channel Phased-Array Transceiver in 0.13um CMOS based on a Variable Phase Ring Oscillator and PLL Architecture”.

Dr. Hashemi is the co-editor of the books “Millimeter-Wave Silicon Technology: 60 GHz and Beyond” published by Springer in 2008, and “mm-Wave Silicon Power Amplifiers and Transmitters” published by the Cambridge University Press in 2016.

Nitin JainNitin Jain

for leadership in the development of physics-based models for mm-wave System-on-Chip Ics

Dr. Nitin Jain received B.Tech. in Electronics from the IIT, Madras, India in 1986, and MS and Ph.D. in Electrical Engineering from the RPI, Troy, NY, the USA in 1989 and 1991, respectively. His Ph.D. work focused on control devices and received the MTT-S graduate student fellowship award. 

Dr. Jain joined MACOM Corporate R&D in 1991 with a focus on electromagnetic (EM) modeling for microwave and millimeter wave circuit design. Among other projects, Dr. Jain was the technical lead of a team that designed the 77GHz automotive radar module for cruise control application. This was widely acclaimed as a great technical achievement and to-date remains a spectacular example of module integration and innovation for industrialization using predictive physical-modeling work. 

From 1998 to 2000, Dr. Jain served as Assistant Professor in the ECE department of Indian Institute of Science, Bangalore, India; and then joined Anokiwave, a company that he founded in San Diego, CA.  Under his leadership, Anokiwave designed multiple mm-wave System-on-Chip products for commercial and military markets, including a fully integrated FMCW automotive radar, another mm-wave IC for commercial satellite internet in QFN package, multiple beams forming IC and other highly integrated ICs. 

Anokiwave products today serve a broad audience: Aerospace and defense phased arrays, satellite communication, and 5G active antenna - many of which are high volume parts. “Firsts” for the company include first to sell commercially 5G antenna beam forming ICs at 26GHz, 28GHz, and 39GHz, and, teaming with an industry partner, “first” commercial phased arrays at 24 and 28GHz. 


Dr. Jain is presently the CTO and Chairman of the Board of Anokiwave and has over 37 publications in international conferences and journals, and more than 35 granted and pending US patents.

Kim 2017 wideChris Hyung-il Kim

for contributions to on-chip circuit reliability evaluation and characterization


Chris H. Kim received his B.S. and M.S. degrees from Seoul National University and a Ph.D. degree from Purdue University. He joined the University of Minnesota in 2004 where he is currently a professor. Prof. Kim is the recipient of the University of Minnesota Taylor Award for Distinguished Research, SRC Technical Excellence Award for his
“Silicon Odometer” research, Council of Graduate Students Outstanding Faculty Award, NSF CAREER Award, Mcknight Foundation Land-Grant Professorship, 3M Non-Tenured Faculty Award, DAC/ISSCC Student Design Contest Award (2 times), IBM Faculty Partnership Award (3 times), IEEE Circuits and Systems Society Outstanding Young Author Award, the ICCAD Ten Year Retrospective Most Influential Paper Award, ISLPED Low Power Design Contest Award (4 times), and ISLPED Best Paper Award (2 times). His group has expertise in digital, mixed-signal, and memory IC design, with special emphasis on circuit reliability, hardware security, radiation effects, time-based circuits, and beyond-CMOS computing.

Photo Lee Sup Kim

Lee-sup Kim

for contributions to energy-efficient multimedia processor architectures


Lee-Sup Kim received the B.S. degree in electronics engineering from Seoul National University, Seoul, Korea, in 1982, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University, Stanford, CA, USA, in 1986 and 1990, respectively.  He was a postdoctoral fellow with Toshiba Corporation, Kawasaki, Japan. Since March 1993, he has been with the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea where he is a Professor. His research interests include energy efficient deep learning hardware architectures and in-memory computing for neural networks. Prof. Kim he received the Author Recognition Award from ISSCC as a contributor of ten or more papers during the period from 2003 to 2013.  He was co-recipient of the best paper runner up award at the 2014 HPCA (IEEE International Symposium on High Performance Computer Architecture) and the best paper award at the 2014 ICCD (IEEE International Conference on Computer Design). He has served on the technical committee of the ISSCC (IEEE International Solid-State Circuits Conference) (2004 ~ 2009).  

farinazFarinaz Koushanfar

for contributions to hardware and embedded systems security and to privacy-preserving computing


Farinaz Koushanfar is a professor and Henry Booker Faculty Scholar in the Electrical and Computer Engineering (ECE) department at University of California San Diego (UCSD), where she directs the Adaptive Computing and Embedded Systems (ACES) Lab. She is the founding co-director of the UCSD Center for Machine-Integrated Computing & Security (MICS). Before joining UCSD, she was a professor in the ECE department at William Marsh Rice University which she joined as an assistant professor 9 years earlier. Prof. Koushanfar received her Ph.D. in Electrical Engineering and Computer Science as well as her M.A. in Statistics and Machine Learning from UC Berkeley. Her research addresses several aspects of efficient computing and embedded systems, with a focus on hardware and system security, real-time/energy-efficient big data analytics under resource constraints, design automation and synthesis for emerging applications, as well as practical privacy-preserving computing. Professor Koushanfar serves as an associate partner of the Intel Collaborative Research Institute for Secure Computing to aid developing solutions for the next generation of embedded secure devices. Dr. Koushanfar is a fellow of the Kavli Foundation Frontiers of the National Academy of Engineering. She has received a number of awards and honors for her research, mentorship, teaching, and outreach activities including the Presidential Early Career Award for Scientists and Engineers (PECASE) from President Obama, the ACM SIGDA Outstanding New Faculty Award, Cisco IoT Security Grand Challenge Award, MIT Technology Review TR-35 2008 (World’s top 35 innovators under 35), as well as Young Faculty/CAREER Awards from NSF, DARPA, ONR and ARO.

ElvisPui-in Mak

for contributions to radio-frequency and analog circuits


Pui-In (Elvis) Mak (S’00-M’08-SM’11-F’19) received the Ph.D. degree from University of Macau (UM), Macao, China, in 2006. He is currently Full Professor at UM Faculty of Science and Technology – ECE, and Associate Director (Research) at the UM State Key Laboratory of Analog and Mixed-Signal VLSI. His research interests are on analog and radio-frequency (RF) circuits and systems for wireless and multidisciplinary innovations.

His involvements with IEEE are: Editorial Board Member of IEEE Press (’14-’16); Member of Board-of-Governors of IEEE Circuits and Systems Society (’09-’11); Senior Editor of IEEE Journal on Emerging and Selected Topics in Circuits and Systems (’14-’15); Associate Editor of IEEE Journal of Solid-State Circuits (’18-), IEEE Solid-State Circuits Letters (’17-), IEEE Transactions on Circuits and Systems I (’10-’11, ’14-’15) and II (’10-’13). He is/was the TPC Vice Co-Chair of ASP-DAC (’16), TPC Member of A-SSCC (’13-’16),  ESSCIRC (’16-’17) and ISSCC (’17-’19). He is/was Distinguished Lecturer of IEEE Circuits and Systems Society (’14-’15) and IEEE Solid-State Circuits Society (’17-’18). He currently chairs the Distinguished Lecturer Program of IEEE Circuits and Systems Society (’18-).

Prof. Mak (co)-received the DAC/ISSCC Student Paper Award’05, CASS Outstanding Young Author Award’10; National Scientific and Technological Progress Award’11; Best Associate Editor of IEEE Transactions on Circuits and Systems II’12-13, A-SSCC Distinguished Design Award’15 and ISSCC Silkroad Award’16. In 2005, Prof. Mak was decorated with the Honorary Title of Value for scientific merits by the Macau Government. He was inducted as an Overseas Expert of the Chinese Academy of Sciences since 2018. He is a Fellow of the IET and IEEE.

Katsufumi NakamuraKatsufumi Nakamura

for contributions to integrated circuits for digital imaging


Katsufumi Nakamura (S’88-M’95-SM’99-F’19) received the B.S. (Hon.) degree in electrical engineering in 1989, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering in 1990 and 1994, respectively, from Carnegie Mellon University (CMU), Pittsburgh, PA.

He spent the 1987-89 summers with Motorola’s Bipolar’ Analog IC Design in Tempe, AZ, and MOS Telecom Design, Austin, TX. From 1991 to 1993, he was a Visiting Researcher at the Central Research Laboratory, Hitachi, Ltd., Tokyo, Japan. In 1994, he joined Analog Devices, Inc., Wilmington, MA, where he was Senior Staff Design Engineer in the High-Speed Converter Group developing ADI’s early technologies in CMOS data converters for embedded applications. He subsequently led ADI’s technology for digital imaging until 2011. In 2005, he was elected to ADI Fellow for his contributions in ADI’s entry into consumer market. In 2011, he assumed the role of the Product-Line Director for ADI’s Consumer Product Group. Since 2017, he has been responsible for ADI’s Healthcare and Consumer Technology.

Dr. Nakamura has served as a committee member for several IEEE conferences, including the Symposium on VLSI Circuits from (VLSI) 2001 to 2008, was the past Program Co-Chair/Chair for the 2007-2008 VLSI Circuits Symposium, the past Conference Co-Chair/Chair for the 2009-2010 VLSI Symposia, and also served as an Associate Editor and Guest Editor for the IEEE Journal of Solid-State Circuits (JSSC) from 1999 to 2004 and 2007-2008, respectively. He is currently serving as a member of the VLSI Symposia Executive Committee. He also served as a member of the Data Converter Sub-Committee of the International Solid-State Circuits Conference (ISSCC) from 2009 to 2013. He has authored, or co-authored numerous conference and journal papers published in ISSCC, VLSI, CICC, and JSSC.


Dr. Nakamura was a co-recipient of SRC Inventor’s Recognition Award in 1992 and holds over 20 issued US. Patents with several patents pending. He was selected to be amongst in the finalists of the 2006 EE Times ACE Innovator of the Year Award. He is a member of Tau Beta Pi and Eta Kappa Nu and is an IEEE Fellow since 2019. 

Samar Saha

Samar Saha
for contributions to compact modeling of silicon field-effect transistors


Samar K. Saha received the Ph.D. degree in Physics from Gauhati University, India and M.S.EM (Engineering Management) degree from Stanford University, USA. Currently, he is the Chief Research Scientist at Prospicient Devices, California, USA and an Adjunct faculty in the Electrical Engineering (EE) department at Santa Clara University, California, USA. Since 1984, he has worked in various technical and management positions for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta. He has, also, worked as a faculty member in the EE departments at Southern Illinois University at Carbondale, Illinois; Auburn University, Alabama; the University of Nevada at Las Vegas, Nevada;  and the University of Colorado at Colorado Springs; Colorado. He has authored over 100 research papers; one book entitled, Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond, CRC Press, Florida (2015); one book chapter on Technology Computer-Aided Design (TCAD), entitled, Introduction to Technology Computer-Aided Design, in Technology Computer Aided Design: Simulation for VLSI MOSFET, C.K. Sarkar (ed.): CRC Press, Florida (2013), and holds 12 US patents. His expertise includes TCAD (2D/3D simulation), compact modeling (MOSFETs, FinFETs, BJTs, TFETs), bulk and thin-body FETs, nonvolatile memory (split-gate flash memories), and high-voltage (LDMOS) process/device architecture, and exploratory device architecture and characterization. His research interests include nanoscale device and process architecture, TCAD, compact modeling, devices for renewable energy, and TCAD and R&D management.

Dr. Saha has served as the 2016-2017 President of the IEEE Electron Devices Society (EDS), and currently, serving as the Junior Past President of IEEE EDS and Editor-In-Chief of the IEEE QuestEDS. He is a Fellow of the Institution of Engineering and Technology (UK), and a Distinguished Lecturer of IEEE EDS. He has served as the chair of the IEEE Technical Activities Board (TAB) Educational Activities Ad Hoc Committee, Vice President of EDS Publications; an elected member of the EDS Board of Governors; Chair of EDS George Smith and Paul Rappaport awards; editor of Regions-5&6 EDS Newsletter, Chair of EDS Compact Modeling Technical Committee, Chair of EDS North America West Subcommittee for Regions/Chapters, a member of the IEEE Conference Publications Committee; a member of the IEEE TAB Periodicals Committee; and the Treasurer, Vice Chair, and Chair of Santa Clara Valley IEEE EDS chapter.

In editorial board, Dr. Saha has served as the head guest editor for the IEEE Transactions on Electron Devices (T-ED) Special Issues (SIs) on “Advanced Compact Models and 45-nm Modeling Challenges” and “Compact Interconnect Models for Giga Scale Integration,” and as a guest editor for the T-ED SI on “Advanced Modeling of Power Devices and their Applications.” He has, also, served as a member of the editorial board of the World Journal of Condensed Matter Physics (WJCMP) published by Scientific Research Publishing (SCIRP). 

Shaojun WeiShaojun Wei

for leadership in integrated circuits engineering of smart cards and reconfigurable devices


Dr. Shaojun Wei is the professorDean of the Department of Microelectronics and Nanoelectronics, Tsinghua University, China; Chief Scientist of the State Key Science and Technology Project; Member of the National Integrated Circuit Industry Development Advisory Committee; President of Fabless Chapter, and Vice President of China Semiconductor Industry Association (CSIA); Fellow of Chinese Institute of Electronics (CIE) and IEEE Fellow. Dr. Wei was the President & CEO of Datang Telecom Technology Co., Ltd. and the CTO of Datang Telecom Industry Group. Dr. Wei has been working on VLSI design methodologies research and reconfigurable computing technology research. He has published more than 200 papers and 3 monographs. Dr. Wei had won many awards including National Second Award for Technology Invention, National Second Award for Technology Progress, SIPO & WIPO Patent Golden Award and etc.

Jared ZerbeJared Zerbe

for contributions to the development of high-performance serial interfaces


Jared Zerbe received the B.S. degree in electrical engineering from Stanford University, Stanford, CA, in 1987. From 1987-1992 he worked at VLSI Technology and MIPS Computer Systems, where he designed high-performance floating-point units.
In 1992, he joined Rambus, Inc., Mountain View, CA, where for over 20 years he specialized in the design of high-speed I/O, PLL/DLL clock-recovery, and data-synchronization circuits. At Rambus he became a distinguished inventor with over 100 issued US patents. He also taught courses at both Berkeley and Stanford in high-speed I/O design and authored or co-authored over 40 IEEE conference and journal papers including forums & tutorials at ISSCC, VLSI and the 1994 ISSCC best paper with Tom Lee. He served on the program committee for DesignCon and VLSI Circuits Symposium from 2010-2013 and was an associate editor for the Journal of Solid State Circuits from 2013-2014.  In 2013 he joined Apple Inc. where he worked in Analog Mixed Signal design. Since 2015 he has been a Silicon Systems Architect in Apple’s Exploratory Design group.

Lin ZhongLin Zhong

for contributions to the development of energy-efficient driver circuits for organic light-emitting diodes


Lin Zhong is Professor of Electrical & Computer Engineering with Rice University. He received his B.S and M.S. from Tsinghua University and Ph.D. from Princeton University. He has been with Rice University since September 2005. At Rice, he leads the Efficient Computing Group to make computing, communication, and interfacing more efficient and effective. He and his students received the best paper awards from ACM MobileHCI, IEEE PerCom, and ACM MobiSys (3), and ACM ASPLOS. He is a recipient of the NSF CAREER Award, the Duncan Award from Rice University, and the RockStar Award from ACM SIGMOBILE. More information about his research can be found at