IEEE Fellows Program
The IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. A brief citation is issued to new Fellows describing their accomplishments and the total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Complete Program Information about the IEEE Fellows Program may be found here. The Fellow Nomination Process is described here. A Senior member can be nominated in one of four categories: application engineer/practitioner, educator, research engineer/scientist or technical leader.
The full list of Solid-State Circuits Society Members who are IEEE Fellows are listed here.
Fellow Evaluation Committee
SSCS Fellows Committee Chair:
SSCS Members Elevated to Fellow in 2021
- Ali Keshavarzi - for contributions to low-power circuits and devices in scaled CMOS technologies
Ahmed Ali - for leadership in high-speed analog-to-digital converter design and calibration
Ahmed M. A. Ali received the B.Sc. and M.Sc. degrees, with distinction and highest honor in electrical engineering from Ain Shams University, Cairo, Egypt, and the Ph.D. degree in electrical engineering from the University of Pennsylvania, Philadelphia. He is currently a Fellow at Analog Devices, where he has led the design and development of several industry firsts in the high-speed data converter field. His past industrial experience include Texas Instruments, Anacad, and Siemens AG. He was an Adjunct Assistant Professor at the University of Pennsylvania and an IEEE SSCS Distinguished Lecturer. He currently serves on the ISSCC Data Converter sub-committee and as an Associate Editor of the IEEE Transactions on Circuits and Systems I: Regular Papers. He is the author of the book: “High Speed Data Converters”, published by the Institution of Engineering & Technology (IET) in 2016, and has more than 50 patents.
Dr. Ali received the S.J. Stein award from the University of Pennsylvania. He is also the recipient of the George Stephenson Foundation award, the Catalyst Foundation fellowship award, the University of Pennsylvania fellowship, and several industry and academic awards.
Benton Calhoun - for contributions to sub-threshold integrated circuits and self-powered systems
Benton H. Calhoun is a Professor of Electrical and Computer Engineering at the University of Virginia and co-Founder / co-CTO at Everactive, Inc. He received his B.S. degree from the University of Virginia in 2000 and the M.S. and Ph.D. degrees from the Massachusetts Institute of Technology in 2002 and 2006, respectively. His research has emphasized energy efficient and sub-threshold circuit design for self-powered, batteryless wireless sensing systems. Starting from fundamental advances in sub-threshold circuits, he has expanded his work to include complete self-powered nodes for Internet of Things (IoT) and body-worn applications. Dr. Calhoun is a co-author of Sub-threshold Design for Ultra Low-Power Systems (Springer, 2006), author of Design Principles for Digital CMOS Integrated Circuit Design (NTS Press, 2012), and has over 220 peer reviewed publications and 22 issued US patents that contribute to the field of energy efficient circuits and systems for self powered and energy constrained applications. He is a Campus Director and Technical Thrust Leader in the NSF Nanosystems Engineering Research Center (ERC) for Advanced Self-Powered Systems of Integrated Sensors and Technologies (ASSIST). Everactive has commercialized this technology and is selling self-powered, energy harvesting wireless sensing solutions in the industrial IoT market.
Yogesh Singh Chauhan - for contributions to compact modeling of Si and GaN transistors
Yogesh Singh Chauhan is a professor at Indian Institute of Technology Kanpur, India. He was with IBM Bangalore during 2007 – 2010; Tokyo Institute of Technology in 2010; University of California Berkeley during 2010-2012; and ST Microelectronics during 2003-2004. He is the developer of several industry standard models: ASM-GaN-HEMT model, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research group is involved in developing compact models for GaN transistors, FinFET, Nanosheet/Gate-All-Around FETs, FDSOI transistors, Negative Capacitance FETs and 2D FETs. His research interests are characterization, modeling, and simulation of semiconductor devices.
He is the Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He is the member of IEEE-EDS Compact Modeling Committee. He is the founding chairperson of IEEE Electron Devices Society U.P. chapter and Vice-chairperson of IEEE U.P. section. He has published more than 200 papers in international journals and conferences.
He received Ramanujan fellowship in 2012, IBM faculty award in 2013 and P. K. Kelkar fellowship in 2015, CNR Rao faculty award, Humboldt fellowship and Swarnajayanti fellowship in 2018. He has served in the technical program committees of IEDM, SISPAD, ESSDERC, EDTM, and VLSI Design Conference.
Robert K. Henderson - for contributions to solid-state single photon imaging
Robert K. Henderson is a Professor of Electronic Imaging in the School of Engineering at the University of Edinburgh. He obtained his PhD in 1990 from the University of Glasgow. From 1991, he was a research engineer at CSEM, Neuchatel, Switzerland. In 1996, he was appointed senior VLSI engineer at VLSI Vision Ltd, Edinburgh, UK where he worked on the world’s first single chip video camera. From 2000, as principal VLSI engineer in STMicroelectronics Imaging Division he developed image sensors for mobile phone applications. He joined University of Edinburgh in 2005, designing the first SPAD image sensors in nanometer CMOS technologies in the MegaFrame and SPADnet EU projects. This research activity led to volume SPAD time-of-flight products in STMicroelectronics FlightSense series, which perform an autofocus-assist function in more than 150 different smartphone models, recently passing the 1 billion-module milestone. He benefits from a long-term research partnership with STMicroelectronics in which he explores medical, scientific and high speed imaging applications of SPAD technology. In 2014, he was awarded a prestigious ERC Advanced Fellowship. Since 2018, he is an advisor to Sense Photonics in automotive LIDAR and a Fellow of the Royal Society of Edinburgh.
Inyup Kang - for leadership in development of chip-set technologies for cellular communications
Inyup Kang received B.S. and M.S. degrees in Electronics Engineering from Seoul National University in 1985 and 1987, respectively, and Ph.D. degree in Electrical Engineering from University of California, Los Angeles (UCLA) in 1996. From 1996 to 2009, he was at Qualcomm, San Diego, and led generations of cellular modem chipsets. From 2010 to 2017, he was in charge of cellular baseband/RF chipset and protocol stack for 2G, 3G, and 4G at Samsung Electronics. From 2017, he is the President and General Manager of System LSI business at Samsung Electronics. His main research interests are in the fundamental and theoretical aspects of wireless communications and intelligent algorithm based on the accelerated evolution.
Dejan Markovic - for contributions to low-power VLSI signal processing and neurotechnology
Dejan Marković is a Professor of Electrical and Computer Engineering at the University of California, Los Angeles (UCLA). He is also affiliated with UCLA Bioengineering Department, Neuroengineering field. He completed the Ph.D. degree in 2006 at the University of California, Berkeley, for which he was awarded 2007 David J. Sakrison Memorial Prize. His current research is focused on implantable neuromodulation systems, domain-specific compute architectures, and design methodologies. Prof. Marković is a co-director of interdisciplinary Center for Neurotechnology (CENT) at UCLA.
Prof. Markovic received an NSF CAREER Award in 2009. In 2010, he was a co-recipient of ISSCC Jack Raper Award for Outstanding Technology Directions. He also received 2014 ISSCC Lewis Winner Award for Outstanding Paper. Dr. Markovic served as an Associate Editor of the IEEE Journal of Solid-State Circuits (2011-2015), Technical Program Committees of ISSCC (2015-2020) and VLSI Circuits Symposium (2016-2019). Dr. Marković co-founded Flex Logix Technologies, a semiconductor IP startup, in 2014, and helped build foundational technology of Ceribell, a medical device startup.
Jun Ohta - for contributions to CMOS image sensors and devices for biomedical applications
Jun Ohta received the B.E., M.E., and Dr. Eng. degrees in applied physics, all from the University of Tokyo, Tokyo, Japan, in 1981, 1983, and 1992, respectively. In 1983, he joined Mitsubishi Electric Corporation, Hyogo, Japan. From 1992 to 1993, he was a Visiting Scientist with the Optoelectronics Computing Systems Center, the University of Colorado at Boulder. In 1998, he joined the Graduate School of Materials Science, Nara Institute of Science and Technology (NAIST), Nara, Japan, as an Associate Professor. He was appointed as a Professor in 2004. His current research interests include smart CMOS image sensors for biomedical applications and retinal prosthetic devices. He is the co-author of more than 200 peer-reviewed journals. He serves as several technical program committee members including ISSCC and VLSI, and as an Associate Editor for IEEE Sensors J. (2014-2017) and IEEE Trans. BioCAS (2018-), an Editorial Board of J. Eng., IET (2013-) and Jpn. J. Appl. Phys. (2017-). Dr. Ohta is a member of the IEEE BioCAS Technical Committee and served as the General Co-Chair of the 2019 IEEE BioCAS, Nara, Japan. He was a Distinguished Lecturer for SSCS in the 2018–19 term.