IEEE Solid-State Circuits Society James D. Meindl Innovators Award

Award Information

This award was established in 2021

This award supports innovation in the field of solid-state circuits by funding projects that build excitement around the field among future generations, encouraging their participation, and awarding applicants whose project proposals are selected. Project examples include, but are not limited to: design activities that engage students at the pre-college or undergraduate level, and/or teams from under-represented groups; development of tools that provide broad access to design and simulation resources; and projects that expand the application of solid-state circuits technology to new areas

This is an annual award and up to 10 applicants may be recognized in a single year, based on the availability of funds in the James D. Meindl Memorial Educational Fund and the approval of the SSCS AdCom. Applicant must be a current SSCS member in good standing, with an initial join date at least in the previous calendar year. This award will be given annually only if a suitable awardee or awardees are identified.

Each recipient receives a development grant of up to $20,000 to support the recipient’s project proposal, plus a plaque and a $5,000 honorarium. Each recipient shall submit a report on project outcomes no later than 18 months following receipt of the award, and the report shall be subject to an audit by the Society.

There will be an open call for applications via the primary communication channels of the Solid-State Circuits Society.  Applications must be received in the year prior to the year the award is presented. The awards period for 2023 has now been closed, check back in Fall 2024 for new opportunities.

The SSCS Award Committee will appoint a sub-committee of experts to evaluate applications as to whether the applicant’s contribution is significant and merits consideration for the Award.

This award will be presented at the International Solid-State Circuits Conference.

 

 

 

 

Submission Instructions

A platform called OpenWater is required to upload nomination packages. For detailed instructions on how to use the OpenWater platform, CLICK HERE

The following materials must be uploaded as part of the nomination package:

1). A one-page paper describing the applicant’s accomplishments and involvement in the field of solid-state circuits. (PDF only 25 MB max)

2). A one-page plan to engage the next generation of IC designers. (PDF only, 25 MB Max)

3). A plan, not to exceed one page, that tells us how the development grant would be used to support a project that will engage the next generation of IC designers (PDF only, 25 MB Max)

4) Two letters of recommendation.

Incomplete nomination packages will not be accepted or considered. 

  

Important Dates and Deadlines

This year's application window is from 9/1/2023 at 12:00 AM to 11/1/2023 at 11:59 PM (UTC-05:00, UTC-04:00 Daylight.) If you have any questions, please use the form at https://sscs.ieee.org/home/contact-sscs.

 

                                                                                   


2023 SSCS James D. Meindl Innovators Award Recipient 

Daniel Limbrick is the recipient of the 2023 SSCS James D. Meindl Innovators Award.

unnamedDr. Limbrick is an Associate Professor in the Electrical and Computer Engineering Department at North Carolina Agricultural and Technical University (NC A&T), Greensboro, NC. As a postdoctoral fellow at the Georgia Institute of Technology, he researched methods to improve routing congestion in monolithic 3D integrated circuits with Dr. Sung Kyu Lim. As a doctoral student, Dr. Limbrick was a member of the Radiation Effects and Reliability (RER) Group and the Security And Fault Tolerance (SAF-T) Research Group, where his research was conducted under the advisement of Dr. William H. Robinson. He received a BS degree in Electrical Engineering at Texas A&M and his MS degree and Ph.D. degree at Vanderbilt University. Dr. Limbrick leads the Automated Design for Emerging Processing Technologies (ADEPT) Laboratory at NC A&T where he researches ways to improve the reliability and scalability of integrated circuits through logic & physical synthesis. His research interests include electronic design automation, post-CMOS technologies, computer architecture, lab-on-a-chip, and the reliability of microelectronics.

 

 

 

Past Recipients


2022: Azad J. Naeemi, Georgia Institute of Technology