IEEE Fellows Program

The IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. A brief citation is issued to new Fellows describing their accomplishments and the total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Complete Program Information about the IEEE Fellows Program may be found here. A Senior member can be nominated in one of four categories: application engineer/practitioner, educator, research engineer/scientist or technical leader. 

The full list of Solid-State Circuits Society Members who are IEEE Fellows are listed here

 

SSCS Fellows Committee Chair: Domine Leenaerts (domine.leenaerts@nxp.com).  

 

2023 IEEE Fellows Elevated by SSCS:

Keith_A._Bowman.jpgKeith Bowman - for contributions to variation-tolerant adaptive processor designs

 

Keith A. Bowman is a Principal Engineer and Manager in the Corporate Research and Development (CRD) Circuit Research Team at Qualcomm Technologies, Inc. in Raleigh, NC, USA.  He is responsible for researching and developing circuit technologies for enhancing the performance, energy efficiency, reliability, and competitiveness of Qualcomm processors.  He pioneered the invention, design, and test of Qualcomm’s first commercially successful circuit for mitigating the adverse effects of supply voltage droops.  He received the B.S. degree from North Carolina State University in 1994 and the M.S. and Ph.D. degrees from the Georgia Institute of Technology in 1995 and 2001, respectively, all in electrical engineering.  From 2001 to 2013, he worked in the Technology Computer-Aided Design (CAD) Group and the Circuit Research Lab at Intel Corporation in Hillsboro, OR, USA.  In 2013, he joined Qualcomm Technologies, Inc.

 

 

Dr. Bowman has published 90+ technical papers in refereed conferences and journals, authored one book chapter, received 30+ US patents, and presented 40+ tutorials on variation-tolerant circuit designs.  He received the 2016 Qualcomm CRD Distinguished Contributor Award for Technical Contributions, representing CRD’s highest recognition, for the pioneering invention of the auto-calibrating adaptive clock distribution circuit, which significantly enhances processor performance, energy efficiency, and yield and is integral to the success of the Qualcomm® Snapdragon™ 820 and future processors.  He received the 2022 Qualcomm IP Achievement Award for high-quality inventions, leading to strong processor performance and energy-efficiency improvements and differentiated products.  In 2019 and 2020, he served as an IEEE SSCS Distinguished Lecturer.  He was the Technical Program Committee (TPC) Chair and the General Conference Chair for ISQED in 2012 and 2013, respectively, and for ICICDT in 2014 and 2015, respectively.  Since 2017, he served on the ISSCC TPC in the Digital Circuits (DCT) Subcommittee.  He is currently the ISSCC DCT Chair.

 

Donhee_Ham_IEEE.jpgDonhee Ham - for contributions to semiconductor electronic interfaces with biological systems

Donhee Ham, from Busan, South Korea, is Gordon McKay Professor of Applied Physics and Electrical Engineering at Harvard University and is a Samsung Fellow. He holds a BS degree in physics (Seoul National University), an MS degree in physics (Caltech), and a PhD degree in electrical engineering (Caltech). His research work is on integrated circuits, CMOS-bio interfaces for neuroscience and biotechnology, machine intelligence and neuromorphic engineering, scalable nuclear magnetic resonance, and beyond-CMOS electronics. His research web is at https://donheehamlab.org. He served as a technical program committee member in IEEE ISSCC and IEEE ASSCC, a guest editor for IEEE JSSC, an associate editor for IEEE Transactions on Biomedical Circuits and Systems, and an IEEE Distinguished Lecturer for the Solid-State Circuits Society.

 

 

okada-1180-3_1.jpgKenichi Okada - for contributions to millimeter-wave communication circuits design

Kenichi Okada received the B.E., M.E., and Ph.D. degrees in Communications and Computer Engineering from Kyoto University, Kyoto, Japan, in 1998, 2000, and 2003, respectively. From 2000 to 2003, he was a Research Fellow of the Japan Society for the Promotion of Science in Kyoto University. In 2003, he joined Tokyo Institute of Technology as an Assistant Professor. He is now a Professor of Electrical and Electronic Engineering at Tokyo Institute of Technology, Tokyo, Japan. He has authored or co-authored more than 500 journal and conference papers. His current research interests include millimeter-wave and terahertz CMOS wireless transceivers for 20/28/39/60/77/79/100/300GHz for 5G, WiGig, satellite and future wireless system, digital PLL, synthesizable PLL, atomic clock, and ultra-low-power wireless transceivers for Bluetooth Low-Energy, and Sub-GHz applications. Prof. Okada is a member of the Institute of Electrical and Electronics Engineers (IEEE), the Institute of Electronics, Information and Communication Engineers (IEICE), the Information Processing Society of Japan (IPSJ), and the Japan Society of Applied Physics (JSAP).

He was a recipient or co-recipient of the Ericsson Young Scientist Award in 2004, the A-SSCC Outstanding Design Award in 2006 and 2011, the ASP-DAC Special Feature Award in 2011 and Best Design Award in 2014 and 2015, the MEXT Young Scientists' Prize in 2011, the JSPS Prize in 2014, the Suematsu Yasuharu Award in 2015, the MEXT Prizes for Science and Technology in 2017, the RFIT Best Paper Award in 2017, the IEICE Best Paper Award in 2018, the RFIC Symposium Best Student Paper Award in 2019, the IEICE Achievement Award in 2019, the DOCOMO Mobile Science Award in 2019, the IEEE/ACM ASP-DAC, Prolific Author Award in 2020, the Kenjiro Takayanagi Achivement Award in 2020, the KDDI Foundation Award in 2020, the IEEE CICC, Best Paper Award in 2020, and more than 50 other international and domestic awards. He is/was a member of the technical program committees of IEEE International Solid-State Circuits Conference (ISSCC), VLSI Circuits Symposium, European Solid-State Circuits Conference (ESSCIRC), Radio Frequency Integrated Circuits Symposium (RFIC), Asian Solid-State Circuits Conference (A-SSCC), and he also is/was Guest Editors and an Associate Editor of IEEE Journal of Solid-State Circuits (JSSC), an Associate Editor of IEEE Transactions on Microwave Theory and Techniques (T-MTT), a Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS).

 

photo_rhee1.jpgWoogeun Rhee - for contributions to phase-locked circuits and systems

Woogeun Rhee received the B.S. degree in electronics engineering from Seoul National University, Seoul, Korea, in 1991, the M.S. degree in electrical engineering from the University of California, Los Angeles, in 1993, and the Ph.D. degree in electrical and computer engineering from the University of Illinois, Urbana-Champaign, in 2001. From 1997 to 2001, he was with Conexant Systems, Newport Beach, CA, where he was a Principal Engineer and developed low-power, low-cost fractional-N synthesizers. From 2001 to 2006, he was with IBM Thomas J. Watson Research Center, Yorktown Heights, NY and worked on clocking area for high-speed I/O serial links, including low-jitter phase-locked loops, clock-and-data recovery circuits, and on-chip testability circuits. In August 2006, he joined the faculty as an Associate Professor at the School of Integrated Circuits (formerly, the Institute of Microelectronics and the Department of Microelectronics and Nanoelectronics), Tsinghua University, Beijing, China, and became a Professor in December 2011. Dr. Rhee is one of a few researchers who made significant contributions to PLL architectures and circuits not only with different careers (academia and industry) but also over different fields (wireless and wireline systems).

Out of 24 U.S. patents he currently holds, 20 U.S. patents are in the area of clocking and frequency generation. His publications cited 4,171 times in Google Scholar are mainly attributed to his remarkable research outcomes in that area. Dr. Rhee is a Region 10 Ex-Officio AdCom member (2020- ) of the IEEE Solid-State Circuits Society, an IEEE SSCS Chapters Steering Committee member (2021- ), and an IEEE Distinguished Lecturer (2016-2017). He currently serves as an Associate Editor for IEEE OPEN JOURNAL OF THE SOLID-STATE CIRCUIT SOCIETY. He has been an Associate Editor for IEEE JOURNAL OF SOLID-STATE CIRCUITS (2012-2018), IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART-II: EXPRESS BRIEFS (2008-2009) and a Guest Editor for IEEE JOURNAL OF SOLID-STATE CIRCUITS Special Issue in November 2012, November 2013, and October 2022. He has served on the Technical Program Committees of several IEEE conferences, including ISSCC, CICC, and A-SSCC. He is the TPC Chair of A-SSCC 2021 and currently serves on the Steering Committee of A-SSCC.

 

LabsPic_SriramVangal_-_Final.jpgSriram Vangal - for contributions to network-on-chip architectures

Sriram Vangal is a Principal Engineer with Intel Labs leading energy-aware computing research for the next generation of Intel products.  He joined Intel Corporation in 1995 and has played a lead role in Multi-core CPU development incorporating network-on-chip (NoC) architectures, and resilient, near-threshold voltage (NTV) computing research.  He received the B.E. degree from Bangalore University, India, in 1993, the M.S. degree from the University of Nebraska, Lincoln, USA in 1995, and the Ph.D. degree from Linköping University, Sweden in 2007 – all in Electrical Engineering. Sriram has received two Intel Achievement Awards, and an Intel Labs Gordon Moore Award for his work. Sriram has served on the ISSCC Technology Directions subcommittee, ISSCC, and NoCs Symposium Technical Program Committees, and as a special-issue editor for JSSC. He has published over 50 conference and journal papers, authored three book chapters on high-performance NoCs and energy efficient NTV designs, and has over 45 patents issued, with 20+ pending.

 

 

Marian_Verhelst4.jpgMarian Verhelst - for contributions to energy-efficient near-sensor processing and embedded Machine Learning Processors

Marian Verhelst is a full professor at the MICAS laboratories of KU Leuven and a research director at imec. Her research focuses on embedded machine learning, hardware accelerators, HW-algorithm co-design and low-power edge processing. She received a PhD from KU Leuven in 2008, and worked as a research scientist at Intel Labs, Hillsboro OR from 2008 till 2010. Marian is a member of the board of directors of tinyML and active in the TPC’s of DATE, ISSCC, VLSI and ESSCIRC and was the chair of tinyML2021 and TPC co-chair of AICAS2020. Marian is an IEEE SSCS Distinguished Lecturer, was a member of the Young Academy of Belgium, an associate editor for TVLSI, TCAS-II and JSSC and a member of the STEM advisory committee to the Flemish Government. Marian received the laureate prize of the Royal Academy of Belgium in 2016, the 2021 Intel Outstanding Researcher Award, and the André Mischke YAE Prize for Science and Policy in 2021.

 

2023 Fellows Elevated by Other IEEE Entities (SSCS Members):

MuhammadMuhammad Khellah - for contributions to design-technology co-optimization of on-die dense memory and fine-grain power-management circuits


Muhammad M. Khellah is currently a principal research scientist at Intel Labs where he leads research on power management, design-technology co-optimization, and application-driven HW acceleration. After receiving his PhD from the University of Waterloo, Canada in 1999, Muhammad first joined Intel’s technology development group and led the design of on-die SRAM caches for the Pentium microprocessor product line. Muhammad received an Intel’s Achievement Award in 2012 for enabling continued SRAM Vmin scaling. Muhammad serves now on the EC of ISLPED, and previously served as associate editor for TCAS-I, special-issue editor for JSSC, TPC & general co-chair of ISLPED, special-sessions chair of CICC, and as a TPC member of ISSCC.  He has published 107 technical papers, and has 126 patents granted, and a few pending. Muhammad is an active mentor of Intel-sponsored university research and was presented with the 2018 Mahboob Khan’s outstanding SRC industry liaison award for his efforts.

 

 

TetsuoTetsuo Endoh – for contributions to nonvolatile memory and spintronic logic

Tetsuo Endoh graduated University of Tokyo Faculty of Science in 1987 and received Ph. D degree from Tohoku University Graduate School of Engineering in 1995. He joined ULSI Research Center Toshiba Co. in 1987 and was engaged in the R&D of NAND Memory. He became a lecturer at the Research Institute of Electrical Communication, Tohoku University in 1995. He is a professor at the Department of Electrical Engineering, the Graduate School of Engineering, Tohoku University and director of the Center for Innovative Integrated Electronic Systems (CIES). His current interests are novel 3D structured device technology, such as GAA type MOSFET and Vertical MOSFETs; high-density memory, such as SRAM, DRAM, 3D-NAND memory and STT-MRAM; and beyond-CMOS technology, such as spintronics-based non-volatile Logic for ultralow power systems such as mobile systems, AI systems and IoT systems

 

 

Thomas MThomas Mikolajickfor contributions to nonvolatile memory

Thomas Mikolajick received the Dipl.-Ing. and the Dr.-Ing. In electrical engineering in 1990 and 1996 both from the University Erlangen-Nuremberg. From 1996 till 2006 he was in semiconductor industry (Siemens Semiconductor, Infineon, Qimonda) developing CMOS processes and memory devices with a strong focus on nonvolatile memories. In 2006 he was appointed professor for material science of electron devices at TU Bergakademie Freiberg. Since 2009 he is a professor for nanoelectronics at TU Dresden and in parallel the scientific director of NaMLab GmbH. He is author or co-author of more than 500 publications (current h-index of 77 according to google scholar) and inventor or co-inventor in more than 50 patent families. He is listed as a highly cited researcher in the 2022 edition of Clarivate´s highly cited researchers list. In 2018 he served as the general chair of the IEEE ESSDERC/ESSCIRC conference in Dresden and in 2020/21/22 as the local chair and in 2023 as the general chair of the IEEE International Memory Workshop (IMW). From 2010 till 2019 he was the speaker of the BMBF leading edge cluster “Cool Silicon”. Currently he he is one of the speakers of the center for advancing electronics Dresden (cfaed). Since 2019 he is also the speaker of the BMBF ForLab consortium. He is a member of IEEE since 1999 and received the senior membership status in 2009. From 2023 on he will be an IEEE Fellow for “Contributions to Nonvolatile Memory”. 

 

Walid PortraitWalid Ali-ahmadfor leadership in development of low-cost direct-conversion cellular RF systems

Walid Ali-Ahmad is currently with Apple Inc. in the Silicon Engineering Group; his technical leadership role at Apple is focused on RF system architecture and engineering for 5G & beyond cellular platforms. Previously, he was Vice President of RF Systems engineering at Samsung Electronics with focus on mmW 5G SOC solution development for cellular User Equipment (UE); he led Samsung's first 5G 28/39GHz antenna phased-array reference module system development, plus RF-modem system solution commercialization in US and Korean mobile phone OEMs.

 

Before his role at Samsung, he worked as RF/Analog Systems Engineering Lead at Facebook (2018-2019) in the connectivity group with focus on development of 60GHz FWA. He was also VP of Technology in QCT at QUALCOMM Inc (2014-2017) with focus on architecture and RF systems design of advanced RF Front-Ends and transceiver cellular systems; he led Qualcomm's first generation sub-6GHz RF Front-End modules system development with focus on MIMO support in the cellular UE 3-6GHz frequency range. He was also associated with UC San Diego as adjunct senior lecturer (2016-18) with teaching focus on RF systems engineering for wireless applications. Between 2007 - 2014, he worked at Mediatek Inc and held last the position of Senior Director of Technology (2010-2014); he founded Mediatek's RF systems team and led the RF systems design of low-cost high performance cellular integrated transceivers that eventually gave Mediatek the lead position as turn-key solutions vendor for the world's mass tier UE market including China market. His initial work on cellular RFIC systems engineering started at Maxim Integrated Products, where he held the role of principal member of Technical staff (1997-2004); at Maxim, he led the system development of the first low-cost low-power WCDMA direct-conversion transceiver IC in SiGe BiCMOS. He holds several patents in the area of RF Front-Ends, and has published many articles and given many talks in the area of RF systems design for cellular and millimeter-wave radio systems. He is an IEEE distinguished microwave lecturer and also served on the IEEE RFIC conference technical program and steering committees from 2004-2022; he was the general chair of the 2018 IEEΕ RFIC conference, and currently, he is serving on the ΙΕΕΕ RFIC advisory committee. Walid received his Masters and PhD  degrees in electrical engineering from the University of Michigan at Ann Arbor, and his Bachelor of Engineering degree with Distinction from the American University of Beirut, Lebanon.

 

GomezRoberto Gomez-garciafor contributions to planar multi-function microwave filters

Roberto Gómez-García (Fellow, IEEE) is a Full Professor with the Department of Signal Theory and Communications, University of Alcalá, Alcalá de Henares, Spain. He has authored/coauthored about 130 articles in international journals and 165 papers in international conferences in his research areas. His current research interests include the design of fixed/tunable high-frequency filters and multiplexers in planar, hybrid, monolithic microwave-integrated circuit technologies, multifunction circuits and systems, RF passive components and application to multi-branch amplifiers, RF displacement-movement sensors, software-defined radio and radar architectures for telecommunications, remote sensing, and biomedical applications. He is a member of several technical committees within MTT-S and CAS-S. He was a recipient of the 2016 IEEE Microwave Theory and Techniques Society (MTT-S) Outstanding Young Engineer Award. He is an IEEE Circuits and Systems Society Distinguished Lecturer from 2020 to 2022. He has served and currently serve an associate/a guest/a senior/a topic editor for several IEEE, IET, and EuMA journals. Since 2022, he has been the Editor-in-Chief of IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS.  

 

 

 

HuaHua Wangfor contributions to high-efficiency microwave and milimeter-wave power amplifiers

 

Oralkan 7020Omer Oralkanfor contributions to micromachined ultrasonic transducers and integrated microsystems development, for imaging, therapy, and sensing

Ömer Oralkan (S’93, M’05, SM’10, F’23) was born in Turkey. He received the B.S. degree from Bilkent University, Ankara, Turkey, in 1995, the M.S. degree from Clemson University, Clemson, SC, USA, in 1997, and the Ph.D. degree from Stanford University, Stanford, CA, USA, in 2004, all in electrical engineering. He was a Research Associate from 2004 to 2007 and a Senior Research Associate from 2007 to 2011 with the E. L. Ginzton Laboratory, Stanford University. In 2012, he joined North Carolina State University, Raleigh, NC, USA, where he is currently a Professor of Electrical and Computer Engineering. His research interests are at the interface of electrical engineering and the life sciences, particularly on using integrated circuits and underlying microfabrication technologies to implement medical devices and supporting systems for diagnostics and therapy. More specifically, his current research focuses on developing devices and systems for ultrasound imaging, photoacoustic imaging, image-guided therapy, biological and chemical sensing, ultrasound neural stimulation, and human-computer interaction. He has authored over 200 scientific publications and has seven issued U.S. patents. Dr. Oralkan was the recipient of the 2022 IEEE Sensors Council Technical Achievement Award in Sensor Systems or Networks – Advanced Career, 2016 William F. Lane Outstanding Teacher Award at North Carolina State University, the 2013 DARPA Young Faculty Award, and the 2002 Outstanding Paper Award of the IEEE Ultrasonics, Ferroelectrics, and Frequency Control (UFFC).

 

QiangfeiQiangfei Xiafor contributions to resistive memory arrays sand devices for in-memory computing

Dr. Xia is a professor of Electrical & Computer Engineering at UMass Amherst and head of the Nanodevices and Integrated Systems Lab (http://nano.ecs.umass.edu/). Before joining UMass, he spent three years at Hewlett-Packard Laboratories. He received his Ph.D. in Electrical Engineering in 2007 from Princeton University. Dr. Xia's research interests include beyond-CMOS devices, integrated systems, and enabling fabrication & integration technologies, with applications in machine intelligence, neuromorphic computing, reconfigurable RF systems, and hardware security. He is a recipient of the DARPA Young Faculty Award (YFA), NSF CAREER Award, and the Barbara H. and Joseph I. Goldstein Outstanding Junior Faculty Award.