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Abstract: High bandwidth memory (HBM) has become a key enabler for AI computing, offering high bandwidth and low power consumption with small form factor. Its 3D-stacked architecture with a wide memory interface significantly enhances performance for AI workloads. However, to eliminate risks that may occur in the 3D stack structure, a lot of design techniques are involved such as DFT/BIST/Redundancy and power delivery for HBM. In particular, HBM requires a lot of consideration in the design process because the environment in which it is tested and it is actually used are different. These design topics for HBM are going to be discussed.
Bio: Jinhyung Lee received the B.S. and Ph.D. degrees in electrical engineering and computer science from Seoul National University, Seoul, South Korea, in 2014 and 2019, respectively.
He joined SK Hynix, Icheon, South Korea. His current research interests include high-speed I/O circuits, adaptive equalizers, and high bandwidth memory (HBM). Dr. Lee received the Best JSSC Paper Award from SSCS Seoul Chapter, in 2021.
Register here: https://ieee.webex.com/weblink/register/r30601908daeb6ec237ac717af7ba87f4