Voltage

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A Low-Quiescent-Current, Low-Ripple Hybrid Converter With Efficient Energy Recycling for Low-Duty-Cycle SoCs

A Low-Quiescent-Current, Low-Ripple Hybrid Converter With Efficient Energy Recycling for Low-Duty-Cycle SoCs 150 150
Author(s): Jianxin Yang, Cheng Huang, Rui P. Martins, Xin Ming, Bo Zhang, Mo Huang

Abstract:

This article presents a modified hybrid Ladder converter for efficient energy recycling in low-duty-cycle systems-on-chip (SoCs) applications. Unlike the conventional schemes that recycle output-capacitor energy back to the battery, the proposed hybrid converter recycles energy into its own capacitors, eliminating battery-recharge losses and improving recycle/recharge efficiency. The design methodology …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3738472
Publisher: IEEE

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Insights into the S-Curve Engineering in Ferroelectric-on-Top Negative-Capacitance CFET for Ultra-Low Power Computing

Insights into the S-Curve Engineering in Ferroelectric-on-Top Negative-Capacitance CFET for Ultra-Low Power Computing 150 150
Author(s): Sandeep Semwal, Pin Su

Abstract:

The growing demand for energy-efficient computing has intensified interest in highly scalable device technologies such as complementary field-effect transistors (CFETs). In this work, we investigate S-curve engineering for a unique ferroelectric-on-top (FE-o-T) negative-capacitance (NC) CFET through calibrated numerical simulations to assess its potential for ultra-low-power computing and supply-voltage scaling. Our …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3740342
Publisher: IEEE

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A Compact XOR Gate Implemented With a Single Straintronic Magnetic Tunnel Junction

A Compact XOR Gate Implemented With a Single Straintronic Magnetic Tunnel Junction 150 150
Author(s): Supriyo Bandyopadhyay

Abstract:

The xor Boolean logic gate is widely used in many applications such as encryption (xor ciphers), binary addition (half- and full-adders), error detection (parity bits), etc., but is challenging to construct because of its demanding conditional dynamics. It typically requires multiple logic switches or other types of gates, which results …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 185 – 191
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3719208
Publisher: IEEE

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A 128-Core 340-GHz 2-D Steerable Array With Efficient Third-Harmonic Enhancement Network and 35-dBm Lensless EIRP in 65-nm CMOS

A 128-Core 340-GHz 2-D Steerable Array With Efficient Third-Harmonic Enhancement Network and 35-dBm Lensless EIRP in 65-nm CMOS 150 150
Author(s): Huibo Wu, Xuan Liu, Shunhua Hu, Quanqin Liao, Yuqun Liu, Xingcun Li, Jianhao Gong, Yue Li, Liang Gao, Wenhua Chen

Abstract:

In this article, a coherent 128-core 340-GHz radiator array is presented. In this array, an efficient third-harmonic enhancement network based on the compact multi-coupling transformer balun is proposed. This network boosts the third-harmonic generation by leveraging the mixing effect between the fundamental andsecond-harmonic components, while improving the balance of the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3731143
Publisher: IEEE

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Probabilistic Computing With Neuromorphic Elements

Probabilistic Computing With Neuromorphic Elements 150 150
Author(s): Zonglong Li, Laurie E. Calvet

Abstract:

This article presents a compact and low-power approach to probabilistic inference based on time-domain analog computation. The proposed system implements a Bayesian classifier using neuromorphic circuit elements simulated in a 130-nm CMOS technology. Probabilities are encoded in the duty cycle of deterministic spiking signals generated by neuron circuits, while likelihood …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 167 – 175
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3712198
Publisher: IEEE

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A Multi-Channel Thermoelectric Energy Harvesting Interface Realizing Uneven-Input MPPT and 62-mV Start-Up

A Multi-Channel Thermoelectric Energy Harvesting Interface Realizing Uneven-Input MPPT and 62-mV Start-Up 150 150
Author(s): Yunzhe Yang, Mo Huang, Sijun Du

Abstract:

A thermoelectric energy harvesting (TEH) interface for applications using multiple thermoelectric generators (TEGs) is proposed. To improve the maximum power point tracking (MPPT) efficiency under uneven temperature distributions across a large surface, the TEH interface employs a single-inductor multi-channel architecture that individually harvests energy from each TEG. Furthermore, it incorporates …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3733544
Publisher: IEEE

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A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI 150 150
Author(s): Haisu Ju, Yingtao Zou, Gabriel M. Rebeiz

Abstract:

This article presents a 6.3–18.4 GHz in-phase and quadrature (I/Q) direct down-conversion receiver featuring reconfigurability in both the radio frequency (RF) and local oscillator (LO) paths. The receiver comprises a multi-band reconfigurable RF front-end, double-balanced passive I/Q mixers, an I/Q LO generation network with a tunable I/Q …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4558 – 4571
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698025
Publisher: IEEE

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One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events

One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events 150 150
Author(s): Zihao Tang, Jiacheng Yang, Rui P. Martins, Mo Huang

Abstract:

One-cycle-balance (OCB) response represents the optimal load-transient response for buck converters, maximizing system energy efficiency and robustness. While prior art has demonstrated OCB response for single load-step events, it fails in consecutive transients, which are prevalent in modern applications. This work overcomes these limitations by introducing an OCB controller that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4975 – 4986
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697453
Publisher: IEEE

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A Low-Power G M-C-Based Continuous-Time ΔΣ ADC With Capacitive Input Feedforward and Duty-Cycled G M Technique

A Low-Power G M-C-Based Continuous-Time ΔΣ ADC With Capacitive Input Feedforward and Duty-Cycled G M Technique 150 150
Author(s): Linran Zhao, Yiming Han, Yaoyao Jia

Abstract:

This article presents a low-power continuous-time (CT) $G_{mathrm {M}}$ -C-based $Delta Sigma $ analog-to-digital converter (ADC) employing capacitive input feedforward and a duty-cycled $G_{mathrm {M}}$ technique to enhance linearity while maintaining high energy efficiency. The ADC employs a CT capacitive network for concurrent signal summation and quantization, enabling input …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3733305
Publisher: IEEE

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