Solids

  • No Comments

One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events

One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events 150 150
Author(s): Zihao Tang, Jiacheng Yang, Rui P. Martins, Mo Huang

Abstract:

One-cycle-balance (OCB) response represents the optimal load-transient response for buck converters, maximizing system energy efficiency and robustness. While prior art has demonstrated OCB response for single load-step events, it fails in consecutive transients, which are prevalent in modern applications. This work overcomes these limitations by introducing an OCB controller that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 4975 – 4986
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3697453
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Low-Power G M-C-Based Continuous-Time ΔΣ ADC With Capacitive Input Feedforward and Duty-Cycled G M Technique

A Low-Power G M-C-Based Continuous-Time ΔΣ ADC With Capacitive Input Feedforward and Duty-Cycled G M Technique 150 150
Author(s): Linran Zhao, Yiming Han, Yaoyao Jia

Abstract:

This article presents a low-power continuous-time (CT) $G_{mathrm {M}}$ -C-based $Delta Sigma $ analog-to-digital converter (ADC) employing capacitive input feedforward and a duty-cycled $G_{mathrm {M}}$ technique to enhance linearity while maintaining high energy efficiency. The ADC employs a CT capacitive network for concurrent signal summation and quantization, enabling input …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3733305
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Analysis and Design of a 2–8 GHz Eight-Phase N-Path Passive Mixer-First Receiver With Overlapping LO Signals and Harmonic Loss Suppression

Analysis and Design of a 2–8 GHz Eight-Phase N-Path Passive Mixer-First Receiver With Overlapping LO Signals and Harmonic Loss Suppression 150 150
Author(s): Shimin Huang, Sanaz Sadeghi, Alyosha C. Molnar

Abstract:

This article presents a technique for suppressing the effects of overlapping LO signals in an eight-phase N-path passive mixer-first receiver. In particular, an architecture for an eight-phase mixer is presented, allowing the receiver to operate at higher frequencies with overlapping 25% duty-cycle LO pulses without incurring significant degradation in loss or …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3726862
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Wide-Lock-in-Range and Fast-Settling-Time, 11.6-to-14-GHz SSPLL With an Event-Driven FLL and a Low-Power Harmonic-Lock Detector

A Wide-Lock-in-Range and Fast-Settling-Time, 11.6-to-14-GHz SSPLL With an Event-Driven FLL and a Low-Power Harmonic-Lock Detector 150 150
Author(s): Youngjun Kim, Siheon Lee, Taehyub Kim, Sunhaeng Heo, Younghyun Lim

Abstract:

This article presents a wide-lock-in-range and fast-settling-time, 11.6-to-14-GHz subsampling phase-locked loop (PLL) subsampling PLL (SSPLL) using an event-driven frequency-locked loop (ED-FLL) and a harmonic-lock detector (HLD). The ED-FLL becomes active only when a frequency disturbance, $f_{\mathrm {D}}$ , is detected, rapidly corrects the frequency error using a lock-expedition algorithm, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3729681
Publisher: IEEE

View on IEEE Xplore

  • No Comments

An Energy-Efficient 8λ × 38-Gb/s/λ Optical WDM Transmitter in 45-nm CMOS SOI

An Energy-Efficient 8λ × 38-Gb/s/λ Optical WDM Transmitter in 45-nm CMOS SOI 150 150
Author(s): Amirreza Shoobi, Kaisarbek Omirzakhov, Flame Feng, Zhehao Yu, Ali Pirmoradi, Firooz Aflatouni

Abstract:

This article presents a monolithically integrated eight-channel optical transmitter (OTX) based on wavelength-division multiplexing (WDM), which is implemented in a 45-nm CMOS SOI process. Ascalable inductorless level-boosting driver is proposed to generate large output swings without level shifters or additional supply domains, enabling energy- and area-efficient operation. The driver is …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3731097
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 100+Gb/s 252–283-GHz RF-Amplifier-Integrated TX/RX Chipset in Standard 65-nm Bulk CMOS

A 100+Gb/s 252–283-GHz RF-Amplifier-Integrated TX/RX Chipset in Standard 65-nm Bulk CMOS 150 150
Author(s): Zhicheng Lin, Hiu Lok Tam, Hao Guo, Xiaoyue Xia, Zijun Guo, Kam Man Shum, Pui-In Mak, Chi Hou Chan

Abstract:

This article presents a 252–283-GHz amplifier-last transmitter (TX) and amplifier-first receiver (RX) wireless front end in standard 65-nm bulk CMOS technology, targeting IEEE 802.15.3d/802.15.3-compliant high-speed point-to-point wireless communications. To overcome the challenges of limited transistor gain and high passive loss that often limit the implementation of J-band RF amplifiers, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3730962
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 1.6-GS/s 13.9-mW 80.2-dB SFDR Single-Channel Pipelined ADC With Dual-Phase Hybrid Amplification

A 1.6-GS/s 13.9-mW 80.2-dB SFDR Single-Channel Pipelined ADC With Dual-Phase Hybrid Amplification 150 150
Author(s): Hongjiang Chen, Jingxiang Wang, Kaize Zhang, Shizhan Mo, Liang Qi, Chao Zhao, Hao Zhang, Zhang Zhang, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo

Abstract:

In this article, we present a 1.6-GS/s single-channel pipelined analog-to-digital converter (ADC). In high-speed ADC designs, residue amplifiers (RAs) face stringent constraints on their amplification time and accuracy. To relax these requirements, first, we propose a dual-phase amplification stage to isolate the serial operations between the second-stage sampling and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3730470
Publisher: IEEE

View on IEEE Xplore

  • No Comments

An 8K-Spin Ising Machine IC With Reconfigurable Many-Body Spin Interactions and 1-D Multi-Chip Scalability

An 8K-Spin Ising Machine IC With Reconfigurable Many-Body Spin Interactions and 1-D Multi-Chip Scalability 150 150
Author(s): Jaeyeong Kim, Jae-Yoon Sim

Abstract:

Combinatorial optimization problems (COPs) have attracted growing interest in CMOS Ising machines as hardware accelerators for near-optimal solution search. However, practical large-scale COP solving remains challenging because existing CMOS Ising machines face substantial preprocessing overhead for irregular or higher order problems and are limited in scalability beyond a single chip. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3730399
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 50-Gb/s Baud-Rate Burst-Mode Receiver Using a Phase Uncertainty Reduction Scheme Achieving 8-ns Phase Locking for 50G-PON in 28-nm CMOS

A 50-Gb/s Baud-Rate Burst-Mode Receiver Using a Phase Uncertainty Reduction Scheme Achieving 8-ns Phase Locking for 50G-PON in 28-nm CMOS 150 150
Author(s): Pingyi Cai, Xiongshi Luo, Ruixian Zhang, Kun Zhang, Wenhan Guan, Jiayao Li, Wenkang Luo, Yangyi Zhang, Quan Pan

Abstract:

This article presents a 50-Gb/s baud-rate burst-mode receiver (BMRX) for 50G-PON. A phase uncertainty reduction (PUR) scheme is proposed to narrow the maximum phase search range from 1 unit interval (UI) to 0.5 UI, thereby reducing the phase locking overhead while preserving low power consumption. To maintain robust burst acquisition across …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3728469
Publisher: IEEE

View on IEEE Xplore

Search this website