Integrated circuits

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A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference

A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference 150 150
Author(s): Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Haitao Wang, Qihao Liu, Zhiming Chen, Hao Wu, Jinshan Yue, Shidong Lv, Xinghua Wang, Pui-In Mak, Xiaoran Li, Feng Zhang

Abstract:

Static random-access memory (SRAM)-based computing-in-memory (CIM) macros have been widely studied to improve the energy efficiency of edge artificial intelligence (AI) inference tasks. However, less attention has been given to AI training, which requires CIM macros to not only perform matrix multiply-accumulate (MAC) operations but also support matrix transposition. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3679560
Publisher: IEEE

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A Wide-Dynamic-Range Photovoltaic Energy Harvester With Adaptive Power-Scalable MPPT Control and Direct Power-to-Digital Converter

A Wide-Dynamic-Range Photovoltaic Energy Harvester With Adaptive Power-Scalable MPPT Control and Direct Power-to-Digital Converter 150 150
Author(s): Yuyan Liu, Huajun Zhang, Mustafa Becermis, Jieyu Liao, Mohit Dandekar, Kofi A. A. Makinwa, Qinwen Fan

Abstract:

This article presents a photovoltaic energy harvester (PVEH) that achieves high maximum power point tracking (MPPT) efficiency and power conversion efficiency across a $100~000{\times }$ input power dynamic range (DR) (from $10~{\mu }$ W to 1W). Wide-dynamic-range operation is challenging due to the inherent tradeoff between MPPT accuracy and controller power consumption. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3675521
Publisher: IEEE

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PERCEL: A Re-Writable NVM CIM Incorporating a CTT-Based Per-Cell DAC

PERCEL: A Re-Writable NVM CIM Incorporating a CTT-Based Per-Cell DAC 150 150
Author(s): Samyak Chakrabarty, Vinod Jacob, Mohammadreza Zeinali, Georgios Karfakis, Siyun Qiao, Ziyi Guo, Puneet Gupta, Subramanian Iyer, Sudhakar Pamarti

Abstract:

Compute in memory (CiM) accelerators perform matrix vector multiplications (MVMs) directly inside memory arrays, reducing data movement and improving both energy efficiency and throughput for AI workloads. To reduce the number of conversions, recent designs use multi-bit compute cells. Nevertheless, practical multi-bit CiM still faces a tension between accuracy, efficiency, …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3680497
Publisher: IEEE

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A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels

A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels 150 150
Author(s): Sang Weun Kim, Jun Seong Kim, Dabin Yun, Seunghoon Ko

Abstract:

This letter presents a multimode readout IC for 6.5-in 34Tx/16Rx on-cell touch AMOLED (OCTA) panels, detecting both conductive and nonconductive objects (NCos) without panel modifications. To enable this dual detection, a reconfigurable analog front-end (AFE) is proposed, functioning as either a capacitance-to-voltage converter or a triboelectric charge sampler. In …

Published in: IEEE Solid-State Circuits Letters
Page(s): 129 – 132
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3680164
Publisher: IEEE

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OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication

OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication 150 150
Author(s): Shady Agwa, Yihan Pan, Georgios Papandroulidakis, Themis Prodromakis

Abstract:

Artificial intelligence (AI) models are currently driven by a significant upscaling of their complexity, with massive matrix-multiplication workloads representing the major computational bottleneck. In-memory computing (IMC) architectures are proposed to avoid the von Neumann bottleneck. However, both digital/binary-based and analog IMC architectures suffer from various limitations, which significantly degrade …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 56 – 64
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3680281
Publisher: IEEE

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A Novel VGSOT-pMTJ Write Circuit for Hybrid CMOS/MTJ CIM Architecture

A Novel VGSOT-pMTJ Write Circuit for Hybrid CMOS/MTJ CIM Architecture 150 150
Author(s): Prashanth Barla, Ramya Moodakare

Abstract:

Hybrid computation-in-memory (CIM) architecture has emerged as the most promising alternative to overcome the drawbacks of the conventional CMOS-only devices used in the conventional von-Neumann architecture. In the hybrid CIM architecture, a pair of perpendicular magnetic tunnel junctions (pMTJs) is used to store one bit of information. Though there are …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 65 – 69
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3679830
Publisher: IEEE

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A 54- $\\mu$ W Design-Agnostic Clock, Voltage, and EM-Pulse Fault-Injection Attack Detection Using Time-to-Voltage Conversion

A 54- $\\mu$ W Design-Agnostic Clock, Voltage, and EM-Pulse Fault-Injection Attack Detection Using Time-to-Voltage Conversion 150 150
Author(s): Yudhajit Ray, Archisman Ghosh, Sarthak Antal, Shreyas Sen

Abstract:

This article presents a state-of-the-art design-agnostic clock, voltage, and electromagnetic pulse (EMP)-based fault-injection attack (FIA) detector. The efficient conversion of time-to-voltage information by integrating amplifiers transforms the time anomaly into the voltage domain, enabling its detection at a lower power consumption. The clock-glitch detector design consumes only $53~\mu $ W …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3655593
Publisher: IEEE

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A Fully-Integrated Wireless Ingestible CMOS Drug-Delivery Chip With Electrochemical Energy Harvesting and pH-Adaptive MPPT for Personalized Therapeutics

A Fully-Integrated Wireless Ingestible CMOS Drug-Delivery Chip With Electrochemical Energy Harvesting and pH-Adaptive MPPT for Personalized Therapeutics 150 150
Author(s): So-Yoon Yang, Deniz Umut Yildirim, Saransh Sharma, Donghyeon Han, Rishabh Mittal, Husna T. Ellis, Jaehong Jung, Eunseok Lee, Yubin Cai, Giovanni Traverso, Anantha P. Chandrakasan

Abstract:

The rapid growth of personalized medicine has driven increased demand for battery-free, energy-efficient ingestible electronics for on-demand gastrointestinal (GI) drug delivery. This article presents the first fully-integrated, battery-free ingestible CMOS platform that harvests energy from a galvanic cell (GC) through a reconfigurable switched-capacitor converter, with pH-adaptive maximum power point tracking (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1082 – 1095
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3647275
Publisher: IEEE

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An Area and Power Efficient Source Driver IC With Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays

An Area and Power Efficient Source Driver IC With Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays 150 150
Author(s): Jaewoong Ahn, Seung Hun Choi, Minseong Um, Jun Yeol An, Hyung-Min Lee

Abstract:

This article proposes a source driver integrated circuit (SD-IC) with a pixel compensator designed to minimize both silicon area and power consumption for organic light-emitting diode (OLED) displays. The proposed SD-IC is capable of driving ultrahigh-definition (UHD) active-matrix OLED (AMOLED) panels with a one-horizontal-time (1-H time) of $7.2~\mu $ s while …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3614134
Publisher: IEEE

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