Gain

  • No Comments

A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification

A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification 150 150
Author(s): Jeroen Ponte, Roel Plompen, Emiel Zijlma, Eric A. M. Klumperink, Harijot Singh Bindra, Bram Nauta

Abstract:

This work describes a direct-conversion IQ receiver (RX) that does not utilize any active linear (power) amplification, covering its design considerations, prototype implementation, and measurement verification. Only RLC components, MOS transistor (MOST) switches, and comparators are used, leading to several unique design challenges. Key among these are the fact that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3611114
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Compact Current-Reusing 6-mW 66–92 GHz Frequency Quadrupler With 5% Peak Power Added Efficiency and >36 dBc Harmonic Rejection in 22-nm FDSOI CMOS

A Compact Current-Reusing 6-mW 66–92 GHz Frequency Quadrupler With 5% Peak Power Added Efficiency and >36 dBc Harmonic Rejection in 22-nm FDSOI CMOS 150 150
Author(s): Shankkar Balasubramanian, Kristof Vaesen, Piet Wambacq, Carsten Wulff

Abstract:

This letter presents a frequency quadrupler with 32% fractional bandwidth (66–92 GHz) and 5% peak power-added efficiency (PAE), capable of operating with an input power of 0 dBm. The quadrupler consisting of two cascaded frequency doublers uses a multiport driven push-push complementary architecture for the first stage to generate differential signals for the second …

Published in: IEEE Solid-State Circuits Letters
Page(s): 301 – 304
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3614381
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS

A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS 150 150
Author(s): Chongyun Zhang, Li Wang, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue

Abstract:

This work presents a 48-Gb/s four-level pulse amplitude modulation (PAM-4) optical receiver (ORX) with a linear analog front-end (AFE) and an integrated sampler. The AFE employs a transadmittance-stage transimpedance-stage (TAS-TIS) topology, replacing conventional CML-based variable gain amplifiers (VGAs) and post-amplifiers, avoiding continuous-time linear equalizers and passive inductors while preserving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3607107
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination

A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination 150 150
Author(s): Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joseph Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri

Abstract:

A four-channel vertical cavity surface-emitting laser (VCSEL)-based co-packaged optical (CPO) transceiver (TRX) is demonstrated, integrating a photodiode (PD) array, a trans-impedance amplifier front-end integrated circuit (TIA-FE IC), an electrical receiver (RX) IC, and optical fiber termination on a single package on the receive side. The transmitter (TX) counterpart incorporates …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3600662
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS

A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS 150 150
Author(s): Chongyun Zhang, Li Wang, Fuzhan Chen, C. Patrick Yue

Abstract:

This letter presents a 0.32 pJ/bit 100-Gb/s PAM-4 CMOS transimpedance amplifier (TIA). Several techniques are proposed to alleviate TIA design tradeoffs while pushing energy efficiency to a limit. A multipeaking input network is designed to relieve the bandwidth (BW) degradation from parasitics of input interface and ESD diodes. An …

Published in: IEEE Solid-State Circuits Letters
Page(s): 273 – 276
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3603569
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver

A 2 pA/ √Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5GHz Bandwidth for Optical Receiver 150 150
Author(s): Yihao Yang, Dan Li, Nan Qi, Binhao Wang

Abstract:

This letter describes an ultra-low-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3584266
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS

A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS 150 150
Author(s): Yu-Kai Chen, Yi-Fan Tseng, Wei-Zhe Su, Chun-Hsing Li

Abstract:

A 302.5-GHz high-gain CMOS THz amplifier is proposed in this work. An electromagnetic (EM) modeling approach, verified by transistor measurements, is employed to optimize transistor layout, effectively reducing gate resistance and drain-to-gate capacitance. This significantly enhances the transistor’s maximum oscillation frequency $f_{mathrm {max }}$ from 239.7 to 367.5 GHz. Furthermore, a $…

Published in: IEEE Solid-State Circuits Letters
Page(s): 165 – 168
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3574413
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Two 7–13-GHz GaAs-SiGe Four–Channel Beamforming Chiplets With/Without Metallic Interlayer Shields

Two 7–13-GHz GaAs-SiGe Four–Channel Beamforming Chiplets With/Without Metallic Interlayer Shields 150 150
Author(s): Nengxu Zhu, Yiting Zhang, Genyin Ma, Fanyi Meng

Abstract:

This letter presents two 7–13-GHz GaAs-SiGe four-channel beamforming chiplets to minimize the chip area. The chips integrate GaAs-based power amplifiers (PAs) and low-noise amplifiers (LNAs) with silicon-based phase and amplitude control modules using gold bumps. To mitigate coupling between the metal patterns of the heterogeneous chips and avoid interference with …

Published in: IEEE Solid-State Circuits Letters
Page(s): 161 – 164
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3573757
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 430- μ A 68.2-dB-SNR 133-dBSPL-AOP CMOS-MEMS Digital Microphone Based on Electrostatic Force Feedback Control

A 430- μ A 68.2-dB-SNR 133-dBSPL-AOP CMOS-MEMS Digital Microphone Based on Electrostatic Force Feedback Control 150 150
Author(s): Jiaqi Dong, Qi Zhang, Xinwen Zhang, Yekan Chen, Yili Shen, Bo Zhao, Yuxuan Luo

Abstract:

This article introduces a high-acoustic-dynamic-range and low-power digital microphone based on the electrostatic force feedback control (EFFC). The proposed design adjusts the sensitivity of the micro-electro-mechanical system (MEMS) by adaptively biasing it at different input amplitudes, thereby extending the dynamic range (DR). The proposed adaptive biasing technique allows the induced …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1199 – 1209
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3531509
Publisher: IEEE

View on IEEE Xplore

Search this website