Feeds

  • No Comments

1-Transistor-Dynamic Random Access Memory as Reservoir for Temporal Signal Processing

1-Transistor-Dynamic Random Access Memory as Reservoir for Temporal Signal Processing 150 150
Author(s): Md Yasir Bashir, Lalith Adithya Sai C., Shubham Sahay

Abstract:

Reservoir computing (RC), a computational paradigm inspired by the recurrent neural networks (RNNs), offers a promising framework for efficient temporal processing with minimal training overhead. Hardware implementation of RC primitive requires devices that exhibit short-term memory, nonlinearity, and energy-efficient state-switching dynamics. While emerging nonvolatile memory (eNVM) technologies have been explored …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 120 – 128
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690766
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture

Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture 150 150
Author(s): Yashvardhan Singh, Siddharth Penumatsa, Prashanth Barla

Abstract:

Spin-transfer torque magnetic tunnel junction (STT-MTJ) is widely recognized as a promising device for computation-in-memory (CIM) architecture due to its advantages, such as simple nonvolatile structure, CMOS compatibility, and scalability. In spite of the advantages, achieving reliable and efficient sensing of STT-MTJ remains a design challenge. This work presents a …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 95 – 103
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690460
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A CMOS Probabilistic Computing Chip With Hardware-Aware Learning

A CMOS Probabilistic Computing Chip With Hardware-Aware Learning 150 150
Author(s): Jinesh Jhonsa, William Whitehead, Yihao Wu, David Mccarthy, Shuvro Chowdhury, Kerem Y. Camsari, Luke Theogarajan

Abstract:

This work demonstrates a compact probabilistic computing system based on a physics-inspired probabilistic bit (p-bit) architecture with 440 interacting spins configured in a chimera graph and occupying 0.44 mm2 of silicon area. Area efficiency is achieved through a current-mode neuron update circuit and a mixed-signal design approach that integrates pitch-matched standard-cell analog …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 86 – 94
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3689506
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Benchmarking of Emerging Material-Based TCAMs

Benchmarking of Emerging Material-Based TCAMs 150 150
Author(s): Ashwin Tunga, Junzhe Kang, Zijing Zhao, Ankit Shukla, Wenjuan Zhu, Shaloo Rakheja

Abstract:

This work presents a comprehensive benchmarking of ternary content-addressable memory (TCAM) implementations using timing-accurate SPICE simulations, systematically comparing conventional CMOS designs with emerging device technologies, including magnetic tunnel junctions (MTJs), ferroelectric tunnel junctions (FTJs), ferroelectric field-effect transistors (FeFETs), and 2-D reconfigurable field-effect transistors (2D RFETs). Key performance metrics, including search …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 104 – 112
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3687143
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation 150 150
Author(s): Wei-Chun Wang, Shida Zhang, Coleman DeLude, Laith Shamieh, Nael Mizanur Rahman, Isha Chakraborty, Justin Romberg, Saibal Mukhopadhyay

Abstract:

An analog compute-in-memory (CIM) Slepian beamforming (SBF) accelerator is introduced for large-scale multi-input–multi-output (MIMO). The design performs complex-valued vector–matrix multiplication in the analog domain to project 256 I/Q inputs into a low-dimensional Slepian subspace and uses a digital backend with 4-tap FIR filters to generate one output beam. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 154 – 157
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690381
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 760 mVPP-Input-Range, 103.6dB-SNDR Direct-Digitization Sensor Readout With Pseudo-Differential Integrator and Impedance-Equalized RDAC

A 760 mVPP-Input-Range, 103.6dB-SNDR Direct-Digitization Sensor Readout With Pseudo-Differential Integrator and Impedance-Equalized RDAC 150 150
Author(s): Kaiwen Zhou, Jianhong Zhou, Yijie Li, Yuying Li, Tian Dong, Zhiliang Hong, Jiawei Xu

Abstract:

A high-precision, direct-digitization sensor readout (DD-RO) based on a continuous-time delta-sigma modulator (CT- $\Delta \Sigma $ M) is presented. The proposed DD-RO incorporates several key innovations to enhance performance. First, a pseudo-differential current-balancing integrator (PD-CBI) significantly extends the linear input range, whereas its intrinsically limited common-mode input range and CMRR are …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3686843
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition

A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition 150 150
Author(s): Kyeongwon Jeong, Can Livanelioglu, Jiawei Liao, Inhee Lee, Taekwang Jang

Abstract:

This article presents a direct-digitization interface for ExG bio-signals’ readout that simultaneously achieves a high dynamic range (DR) and a low noise-efficiency factor (NEF). The proposed delta amplification (DA) and feedback cancellation technique reduce both the input and output ranges of the first amplifier, thus allowing the use of a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3685168
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models

Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising–Similarity for Diffusion Models 150 150
Author(s): Ruiqi Guo, Lei Wang, Xiaofeng Chen, Keyi Jiang, Zhiheng Yue, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu, Shouyi Yin

Abstract:

Diffusion models have recently revolutionized the field of image synthesis due to their ability to generate photorealistic images. However, one of the main drawbacks of diffusion models is that the image generation process is expensive. Large image-to-image networks have to be applied multiple times in order to iteratively optimize the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3684745
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing

A Time-Domain CNN Engine With Adaptive-Precision Computing and Threshold-Controllable Prediction for Edge Computing 150 150
Author(s): Aoming Zhan, Ye Zhao, Yulin Zhang, Gengchen Han, Qihang Jiang, Long Chen, Yumei Zhou, Shushan Qiao

Abstract:

With the growing demand for energy-efficient convolutional neural network (CNN) accelerators in edge intelligence, conventional digital CNN processors with fixed precision incur excessive switching energy and limited scalability. This work presents a time-domain CNN (TD-CNN) engine that achieves adaptive precision and computation reduction for ultralow-power operation. The main features include: 1) …

Published in: IEEE Solid-State Circuits Letters
Page(s): 142 – 145
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3687395
Publisher: IEEE

View on IEEE Xplore

Search this website