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A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration

A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration 150 150
Author(s): Wei-Hsing Huang, Janak Sharda, Cheng-Jhih Shih, Yuyao Kong, Faaiq Waqar, Pin-Jun Chen, Yingyan Lin, Shimeng Yu

Abstract:

Conventional large language models (LLMs) have large parameter sets, making inference costly and energy-intensive; Mixture-of-Experts (MoE) mitigates this by activating fewer weights per token, but fine-grained MoE LLMs still face runtime workload variability, inefficient conventional scheduling, and high HBM loading energy/bandwidth demands. A3D-MoE addresses these with 3D heterogeneous …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3713957
Publisher: IEEE

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A 0.1514-pJ/bit 18-Gb/s/wire Run-Length-Tolerant Transition-Driven AC-Coupled Transceiver for Die-to-Die Interfaces

A 0.1514-pJ/bit 18-Gb/s/wire Run-Length-Tolerant Transition-Driven AC-Coupled Transceiver for Die-to-Die Interfaces 150 150
Author(s): Jun-Cheol Lee, Joo-Hyung Chae

Abstract:

This article presents a transition-driven AC-coupled transceiver (TRX) optimized for low-power and compact die-to-die (D2D) interfaces. To address the limitations of conventional PMOS- and transimpedance-amplifier (TIA)-based receivers (RXs), the proposed RX architecture employs a small 130-fF coupling capacitor to capture only transition information, eliminating the need for bulky …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3708634
Publisher: IEEE

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A 27-Gb/s/pin Inverter-Based Delay-Matched PAM-3 Transceiver With Pattern-Selective Switching Jitter Compensation for Die-to-Die Interfaces

A 27-Gb/s/pin Inverter-Based Delay-Matched PAM-3 Transceiver With Pattern-Selective Switching Jitter Compensation for Die-to-Die Interfaces 150 150
Author(s): Changmin Sim, Seongcheol Kim, Seungwoo Park, Junseob So, Hwaseok Shin, Taehwan Kim, Seon-Been Lee, Minkyun Shim, Chulwoo Kim

Abstract:

This article presents a 27-Gb/s/pin inverter-based delay-matched three-level pulse amplitude modulation (PAM-3) transceiver for short-reach die-to-die (D2D) interfaces. The proposed design uses two parallel, identical offset-programmable transimpedance amplifiers (TIAs) to independently generate two finely tunable PAM-3 reference levels with minimal parasitic loading, enabling multi-level signaling within a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3706449
Publisher: IEEE

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