Current

A Low-Noise Fast-Switching Transconductor for Sub-Sampling PLLs

A Low-Noise Fast-Switching Transconductor for Sub-Sampling PLLs 150 150

Abstract:

Sub-sampling PLLs use a transconductor following the sampling phase detector. To reduce the loop-filter capacitor size, a small transconductance with polarity switching can drive a switched-capacitor loop filter; however, slow settling introduces uncertainty in the PLL parameters, and excess output noise directly contributes to PLL jitter. Realizing a small transconductance …

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A Delay-Compensated RC Oscillator With Constant Ramp Peak-Voltage Achieving 23 ppm/°C Temperature Coefficient from -40 to 100 °C

A Delay-Compensated RC Oscillator With Constant Ramp Peak-Voltage Achieving 23 ppm/°C Temperature Coefficient from -40 to 100 °C 150 150

Abstract:

This letter presents a delay-compensated RC relaxation oscillator for enhanced frequency stability. The proposed architecture employs a peak-sampling circuit to detect the charging-capacitor peak voltage. A feedback loop composed of an error amplifier and compensation resistors adaptively raises the capacitor DC baseline to compensate for comparator-delay-induced frequency error, while phase-alternating …

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A CMOS-MRAM Stochastic Neuron with Programmable Pulse-Encoded Activation Functions

A CMOS-MRAM Stochastic Neuron with Programmable Pulse-Encoded Activation Functions 150 150

Abstract:

Probabilistic computing and uncertainty-aware inference require hardware-efficient generation of stochastic activations. This paper presents a CMOS-MRAM stochastic neuron in which stochasticity is encoded into programming-pulse distributions rather than relying exclusively on the intrinsic stochastic switching dynamics of the MRAM device. The nonlinear switching boundary of the SOT-MRAM acts as a …

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A Threshold-Voltage Self-Compensated Dual-Gate IGZO TFT Cell for Robust In-Sensor Computing

A Threshold-Voltage Self-Compensated Dual-Gate IGZO TFT Cell for Robust In-Sensor Computing 150 150

Abstract:

In-sensor computing (ISC) based on amorphous metal-oxide thin-film transistors (TFTs) promises compact, high-density vision chips, yet large-scale integration is vulnerable to process-induced threshold-voltage ( $V_{th}$ ) variations that critically degrade computational robustness and accuracy. This work proposes a novel 3T1C (3-Transistor, 1-Capacitor) ISC cell circuit based on photodiode (PD)-gated …

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SEAL: Multitenant Security-Aware Layer Mapping for Heterogeneous 3-D CiM Accelerators

SEAL: Multitenant Security-Aware Layer Mapping for Heterogeneous 3-D CiM Accelerators 150 150

Abstract:

Heterogeneous 3-D compute-in-memory (CiM) architectures have emerged as an efficient acceleration paradigm for deep neural network (DNN) inference by leveraging the complementary characteristics of diverse memory technologies enabled through 3-D integration. Prior work has focused on architectural efficiency and workload-mapping optimization, leaving the security implications of heterogeneous CiM systems largely …

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Physics-Guided Active Learning and Geometry-Aware Electrothermal Screening of Semiconductor Devices: A GaN Case Study

Physics-Guided Active Learning and Geometry-Aware Electrothermal Screening of Semiconductor Devices: A GaN Case Study 150 150

Abstract:

Exploring high-dimensional semiconductor device design spaces under coupled electrothermal constraints remains challenging, particularly in 3-D heterogeneous systems with tightly coupled electrical, thermal, and integration requirements. Conventional TCAD-driven exploration is physically accurate but computationally expensive and offers limited insight into governing parameters. This work presents physics-guided active learning trigate optimization (PALTO), …

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A Wide-Load-Range FVF-Based LDO With Adaptive Capacitor Amplifier and Ripple-Cancellation Technique for RF Systems

A Wide-Load-Range FVF-Based LDO With Adaptive Capacitor Amplifier and Ripple-Cancellation Technique for RF Systems 150 150

Abstract:

This article proposes a low-dropout regulator (LDO) using a flipped voltage follower (FVF) topology for wide-load-range and low-noise applications. The proposed LDO features a fast load transient response and wide-spectrum power-supply rejection (PSR) performance. To optimize frequency responses at light load and improve PSR performance in the mid-frequency band, an …

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A 12-bit 1-GS/s SAR-Assisted Pipeline ADC With Gain-Stable Dual-Path Residue Amplification and Partially Look-Ahead Parallel Conversion

A 12-bit 1-GS/s SAR-Assisted Pipeline ADC With Gain-Stable Dual-Path Residue Amplification and Partially Look-Ahead Parallel Conversion 150 150

Abstract:

This article presents a 12-bit, 1-GS/s SAR-assisted pipelined ADC implemented in 28-nm CMOS featuring accurate residue amplification (RA) with low gain variation. A dual-path residue amplifier embeds an open-loop gain-error-cancellation path within the closed-loop amplification path, providing accurate gain and robust gain stability without additional timing or power overhead. …

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Design and Analysis of Windmill-Shaping-Geometry Eight-Phase Oscillator Incorporating Magnetic and Dual-Injection Coupling Techniques

Design and Analysis of Windmill-Shaping-Geometry Eight-Phase Oscillator Incorporating Magnetic and Dual-Injection Coupling Techniques 150 150

Abstract:

This article reports a compact millimeter-wave (mm-wave) quad-core eight-phase oscillator featuring magnetic coupling and dual-injection coupling. Specifically, the quad-core oscillator is integrated in an LC-ring configuration via a windmill-shaping transformer for phase noise (PN) and chip area reduction. The eight-phase oscillator could eliminate the oscillation mode ambiguity and save the …

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