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Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture

Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture 150 150
Author(s): Yashvardhan Singh, Siddharth Penumatsa, Prashanth Barla

Abstract:

Spin-transfer torque magnetic tunnel junction (STT-MTJ) is widely recognized as a promising device for computation-in-memory (CIM) architecture due to its advantages, such as simple nonvolatile structure, CMOS compatibility, and scalability. In spite of the advantages, achieving reliable and efficient sensing of STT-MTJ remains a design challenge. This work presents a …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 95 – 103
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690460
Publisher: IEEE

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The Impact of Magnetic Field on Defective FDSOI and FinFET Devices

The Impact of Magnetic Field on Defective FDSOI and FinFET Devices 150 150
Author(s): Munazza Sayed, Hussam Amrouch

Abstract:

This article explores the efficacy of a unique defect detection mechanism for the FinFET and FDSOI transistors: magnetomodulation of drain current. Using multiphysics technology CAD (TCAD), we model the impact of static and transient magnetic fields on drain current in the following defect-free and defective devices: 1) FDSOI with interface trap …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 113 – 119
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3686904
Publisher: IEEE

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A Single-Lead ECG Wearable Sensor With 1.04 s Latency for Cardiac and Biometric Detection Tasks

A Single-Lead ECG Wearable Sensor With 1.04 s Latency for Cardiac and Biometric Detection Tasks 150 150
Author(s): Yuxin Ji, Chao Wang, Yuzhi Hao, Yang Zhao, Jian Zhao, Mingyi Chen, Guoxing Wang, Yong Lian, Yongfu Li

Abstract:

The wearable electrocardiogram (ECG) sensor has immense potential for cardiovascular healthcare monitoring. However, uploading ECG signals to server-side devices for diagnosis poses privacy risks. Multi-tasking ECG processors rely on multi-beat windows and complex models, leading to high latency and energy consumption that limit deployment in resource-constrained wearable devices. In this …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3700263
Publisher: IEEE

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GUARD: A Clock and Voltage Glitch Detector With On-Demand Protection

GUARD: A Clock and Voltage Glitch Detector With On-Demand Protection 150 150
Author(s): Mao Li, Sanu K. Mathew, Vivek De, Mingoo Seok

Abstract:

This article presents GUARD, a fully digital, variation-tolerant detector for clock and voltage glitch attacks, featuring an integrated on-demand protection mechanism. Fabricated in 28-nm CMOS, GUARD provides robust security for digital systems by monitoring the system clock for maliciously injected faults. It employs a pair of optimized time-to-digital converters (TDCs) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3696209
Publisher: IEEE

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OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication

OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication 150 150
Author(s): Shady Agwa, Yihan Pan, Georgios Papandroulidakis, Themis Prodromakis

Abstract:

Artificial intelligence (AI) models are currently driven by a significant upscaling of their complexity, with massive matrix-multiplication workloads representing the major computational bottleneck. In-memory computing (IMC) architectures are proposed to avoid the von Neumann bottleneck. However, both digital/binary-based and analog IMC architectures suffer from various limitations, which significantly degrade …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 56 – 64
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3680281
Publisher: IEEE

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A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller

A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller 150 150
Author(s): Yanshu Guo, Yaoyu Li, Wenqiang Huang, Tian Tian, Nan Wu, Siqi Zhang, Qichun Liu, Tiefu Li, Zhihua Wang, Ning Deng, Yuanjin Zheng, Hanjun Jiang

Abstract:

This article presents a cryogenic quantum interface chipset at 3.5 K for superconducting transmon qubit operations. The chipset comprises a phase-detection readout and a phase-shifter-based polar-modulation controller with flexible scalability. With the proposed phase-detection readout scheme, a 9-bit time-to-digital converter (TDC)-based state detector is used to read out the qubit …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 18
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695612
Publisher: IEEE

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A Third-Harmonic-Enhanced Triple-Push DCO Utilizing Source-Combining Technique

A Third-Harmonic-Enhanced Triple-Push DCO Utilizing Source-Combining Technique 150 150
Author(s): Qiyao Jiang, Zhuo Xu, Quan Pan, Pui-In Mak, Rui P. Martins, Jun Yin

Abstract:

This article presents a detailed investigation into optimizing the amplitude and phase of the transistor’s terminal voltages to generate a high 3rd-harmonic current in the millimeter-wave (mm-Wave) frequency. Based on the analysis, the digitally controlled source-combining triple-push (SCTP) oscillator is derived to significantly enhance the 3rd-harmonic current by introducing …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3692500
Publisher: IEEE

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FeFET-Based CMOS Current Starvation Programmable Delay Element

FeFET-Based CMOS Current Starvation Programmable Delay Element 150 150
Author(s): Albi Mema, Simon Thomann, Hussam Amrouch

Abstract:

Programmable delay elements (PDEs) are crucial circuit building blocks that enable precise timing adjustments of signal transitions. They are used in various critical applications, like time-to-digital converters. They are often used to mitigate aging by clock skew tuning postfabrication. However, typical CMOS PDE designs require many transistors while still offering …

Published in: IEEE Solid-State Circuits Letters
Page(s): 166 – 169
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3692304
Publisher: IEEE

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QVGA CMOS LiDAR Sensor With nMOS-Only SPAD Analog Front-End and Area-Efficient Priority Histogramming TDC

QVGA CMOS LiDAR Sensor With nMOS-Only SPAD Analog Front-End and Area-Efficient Priority Histogramming TDC 150 150
Author(s): Minkyung Kim, Hyeongseok Seo, Songhyeon Kim, Jung-Hoon Chun, Seong-Jin Kim, Jaehyuk Choi

Abstract:

This article presents a high-resolution (HR) CMOS light detection and ranging (LiDAR) sensor capable of generating quarter video graphics array (QVGA) ( $320~{\times }~240$ ) depth images. To support high pixel density, the sensor employs a compact 6-transistor (6-T) nMOS-only single-photon avalanche diode (SPAD) analog front-end (AFE) with a column-shared active recharge circuit. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3687569
Publisher: IEEE

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