Circuits and systems

A 95.3% Efficiency APT/AET/SPT Multimode Multiband CMOS/GaN Envelope Tracking for 6G-Oriented Systems

A 95.3% Efficiency APT/AET/SPT Multimode Multiband CMOS/GaN Envelope Tracking for 6G-Oriented Systems 150 150

Abstract:

This article proposes an envelope-tracking (ET) supply modulator (SM) that is scalable for sixth-generation (6G) communication systems. The design leverages a cost-efficient CMOS process for the power converters and a high-performance GaN process for the high-frequency power amplifier (PA) and the depletion-mode-only GaN-based amplifier. The proposed ET supply modulator (ETSM) …

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An 800MS/s 13b 2x TI Pipelined-SAR ADC with Rapid Digital Amplification

An 800MS/s 13b 2x TI Pipelined-SAR ADC with Rapid Digital Amplification 150 150

Abstract:

This work proposes a rapid digital amplification (RDA) with residue-aware reference, offering an equivalent open-loop (OL) gain enhancement of 25 dB and reducing the inter-stage gain error (ISGE)-induced SNR degradation by 20 dB, with an extra amplification latency of only 200 ps. It is implemented in an 800MS/s 13b two-way time-interleaved (…

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Self-Enabled Write Assist Cells for High-Density SRAM in Resistance-Dominated Technology Node

Self-Enabled Write Assist Cells for High-Density SRAM in Resistance-Dominated Technology Node 150 150

Abstract:

As technology scaling increases interconnect resistance, writeability degradation in static random access memory (SRAM) becomes critical. This article presents a self-enabled write assist cell (SEWAC) that mitigates writeability degradation caused by increased bitline resistance (R ${}_{\mathrm {BL}}$ ) without requiring timing control. The SEWAC has a cell-compatible layout with the standard 6…

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A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators

A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators 150 150

Abstract:

This work presents an injection-locked oscillator (ILO)-based feature extraction (FEx) system. It combines voltage- and time-domain signal processing to implement a power-efficient programmable gain amplifier (PGA) and a small-footprint, high-selectivity ILO-based voltage-to-time converter bandpass filter (VTC-BPF) bank and rectifier. The VTC-BPF enables direct analog-to-time conversion, eliminating the need for …

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A Low-Jitter Fractional-N Sampling PLL With Voltage-Domain Quantization-Error Cancellation Using a Nonlinearity-Replication Technique

A Low-Jitter Fractional-N Sampling PLL With Voltage-Domain Quantization-Error Cancellation Using a Nonlinearity-Replication Technique 150 150

Abstract:

This work presents a low-jitter, low-fractional-spur fractional- $N$ digital sampling phase-locked loop (SPLL) that generates output frequencies from 10.4to 11.8GHz. Conventional fractional- $N$ PLLs employ a digital-to-time converter (DTC) to cancel the quantization error (Q-error) of the delta-sigma modulator ( $Delta Sigma $ M). To address the nonlinearity (NL) of the DTC, …

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High-Precision Close-to-Analog Programming of PCM Cells as Devices for AiMC Edge-AI

High-Precision Close-to-Analog Programming of PCM Cells as Devices for AiMC Edge-AI 150 150

Abstract:

This article presents a high-precision close-to-analog programming methodology for phase-change memory (PCM) cells, targeting analog in-memory computing (AiMC) architectures for edge-artificial intelligence (AI) applications. By leveraging an iterative accumulation approach during the verify phase, the proposed technique enhances the effective number of bits (ENOBs) achievable in PCM cells. Experimental validation …

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An Ultralow Cross-Regulation Single-Inductor Multiple-Output (SIMO) Buck Converter Using Reordered Power-Distributive Control

An Ultralow Cross-Regulation Single-Inductor Multiple-Output (SIMO) Buck Converter Using Reordered Power-Distributive Control 150 150

Abstract:

A single-inductor multiple-output (SIMO) buck converter employing reordered power-distributive control (RPDC) is presented to achieve ultralow cross regulation. Adedicated power-distribution controller implements RPDC by adaptively adjusting the switching sequence: when the inductor current is insufficient, the switching period is extended, and when excessive, an end phase in the form of …

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A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference

A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference 150 150

Abstract:

Static random-access memory (SRAM)-based computing-in-memory (CIM) macros have been widely studied to improve the energy efficiency of edge artificial intelligence (AI) inference tasks. However, less attention has been given to AI training, which requires CIM macros to not only perform matrix multiply-accumulate (MAC) operations but also support matrix transposition. …

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A Wide-Dynamic-Range Photovoltaic Energy Harvester With Adaptive Power-Scalable MPPT Control and Direct Power-to-Digital Converter

A Wide-Dynamic-Range Photovoltaic Energy Harvester With Adaptive Power-Scalable MPPT Control and Direct Power-to-Digital Converter 150 150

Abstract:

This article presents a photovoltaic energy harvester (PVEH) that achieves high maximum power point tracking (MPPT) efficiency and power conversion efficiency across a $100~000{\times }$ input power dynamic range (DR) (from $10~{\mu }$ W to 1W). Wide-dynamic-range operation is challenging due to the inherent tradeoff between MPPT accuracy and controller power consumption. …

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