Capacitors

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A Dual-Input Bidirectional Three-Level Battery Charger Using Coarse-Fine V CF Balancing and Frequency Foldback Control for Foldable Mobile Applications

A Dual-Input Bidirectional Three-Level Battery Charger Using Coarse-Fine V CF Balancing and Frequency Foldback Control for Foldable Mobile Applications 150 150
Author(s): Woojin Hong, Hyebong Ko, Jinwoo So, Woonhyung Heo, Yonghwan Cho, Jeongdu Yoo, Ho-Sung Son, Youngwoo Chung, Dong-Joon Kim, Byeonghyeon Jin, Minkyu Kwon, Kyungmin Park, Daeyong Han, Sungkye Cho, Daewoong Cho, Jung Wook Heo, Sungwoo Lee, Sungwoo Moon, Hyoung-Seok Oh, Hwayeal Yu

Abstract:

Foldable mobile applications recently have been leading the battery charger to have a slim height with a small form-factor and high efficiency at higher input voltages to increase the power density. Another trend for mobile applications is the power sharing, which enables to supply two mobile devices simultaneously. To meet …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3618150
Publisher: IEEE

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Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs 150 150
Author(s): Sadik Yasir Tauki, Rudra Biswas, Rakesh Acharya, Jiahui Duan, Rajiv Joshi, Kai Ni, Vijaykrishnan Narayanan

Abstract:

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 148 – 156
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3619908
Publisher: IEEE

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Benchmarking of FERAM-Based Memory System by Optimizing Ferroelectric Device Model

Benchmarking of FERAM-Based Memory System by Optimizing Ferroelectric Device Model 150 150
Author(s): Mohammad Adnaan, Saeideh Alinezhad Chamazcoti, Emil Karimov, Marie Garcia Bardon, Francky Catthoor, Jan van Houdt, Azad Naeemi

Abstract:

We present a framework for design technology co-optimization (DTCO) of the main memory system with one transistor-one capacitor (1T1C) ferroelectric random access memory (FERAM) as an alternative to dynamic random access memory (DRAM). We start with the ferroelectric capacitor device model and perform array-level memory circuit simulation. Then, we …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 99 – 106
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3618883
Publisher: IEEE

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An Area and Power Efficient Source Driver IC With Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays

An Area and Power Efficient Source Driver IC With Multi-Line Sensing Real-Time Pixel Compensation for OLED Displays 150 150
Author(s): Jaewoong Ahn, Seung Hun Choi, Minseong Um, Jun Yeol An, Hyung-Min Lee

Abstract:

This article proposes a source driver integrated circuit (SD-IC) with a pixel compensator designed to minimize both silicon area and power consumption for organic light-emitting diode (OLED) displays. The proposed SD-IC is capable of driving ultrahigh-definition (UHD) active-matrix OLED (AMOLED) panels with a one-horizontal-time (1-H time) of $7.2~\mu $ s while …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3614134
Publisher: IEEE

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A 4.6 μW, 133-VPP Common-Mode Interference-Tolerant Biopotential Amplifier for Two-Electrode Recording System in 110-nm CMOS

A 4.6 μW, 133-VPP Common-Mode Interference-Tolerant Biopotential Amplifier for Two-Electrode Recording System in 110-nm CMOS 150 150
Author(s): Yongjae Park, Yeong-Jin Mo, Jeong-Hoon Kim, Gert Cauwenberghs, Seong-Jin Kim

Abstract:

This article presents a biopotential recording analog front-end (AFE) specifically tailored for a two-electrode measurement system, capable of capturing small biopotential signals while tolerating a large common-mode interference (CMI) over 130 VPP. By leveraging the Miller effect, the proposed CMI-Follower provides a significantly low common-mode input impedance ( $Z_{\text {IN-CM-C}}$ ), achieving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3613410
Publisher: IEEE

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Ultra-Low-Power Dynamic-Bias Comparators With Self-Clocked Latch in 65-nm CMOS

Ultra-Low-Power Dynamic-Bias Comparators With Self-Clocked Latch in 65-nm CMOS 150 150
Author(s): Anojh Kumaran Rajendra, Harijot Singh Bindra, Bram Nauta

Abstract:

This article introduces two comparators featuring a dynamic-bias preamplifier and self-clocked latches, tailored for ultra-low-power and medium-speed applications with <500- $\mu $ V input-referred noise (IRN). The proposed self-clocked latches are activated by the preamplifier outputs and therefore operate with a lower common-mode current, which in turn minimizes the crowbar current …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3612157
Publisher: IEEE

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An 8.5 MHz 42 ppm/°C Relaxation Oscillator With Charge-Pump Delay Cancellation and Digital Chopping Demodulation

An 8.5 MHz 42 ppm/°C Relaxation Oscillator With Charge-Pump Delay Cancellation and Digital Chopping Demodulation 150 150
Author(s): Yongjia Li, Jianlin Xia, Feng Cheng, Yifan Cao, Jin Wu, Encheng Zhu, Xiaofeng Sun, Dejin Wang, Long Zhang, Zhongyuan Fang, Weifeng Sun

Abstract:

This letter presents an RC oscillator featuring a mixed-signal compensation loop that simultaneously mitigates comparator offset, loop delay, switch on-resistance, and temperature dependency. The oscillator employs an auxiliary comparator, a charge pump, and a differential difference amplifier (DDA)-based main comparator to suppress ramping voltage overshoots caused by device and …

Published in: IEEE Solid-State Circuits Letters
Page(s): 333 – 336
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3615833
Publisher: IEEE

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A Zero-Voltage Switching Buck Converter With Enhanced Efficiency Over a Wide Load Range

A Zero-Voltage Switching Buck Converter With Enhanced Efficiency Over a Wide Load Range 150 150
Author(s): Jingyi Yuan, Qingqing Min, Siyang Liu, Lin Cheng

Abstract:

This article presents a wide-input-range buck converter featuring a conduction-loss-minimized zero-voltage switching (ZVS) technique. The proposed ZVS topology enables accurate ZVS operation across a wide range of input voltage ( $V_{\mathrm {IN}}$ ) and load current ( $I_{\mathrm {O}}$ ). By keeping the auxiliary inductor current pulse in the ZVS branch separate …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3609411
Publisher: IEEE

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A 40.68-MHz, 200-ns-Settling Active Rectifier for mm-Sized Implants

A 40.68-MHz, 200-ns-Settling Active Rectifier for mm-Sized Implants 150 150
Author(s): Ronald Wijermars, Yi-Han Ou-Yang, Sijun Du, Dante G. Muratore

Abstract:

This letter describes a fast-settling active rectifier for a 40.68 MHz wireless power transfer receiver for implantable applications. Fast-settling and low power are achieved through a novel direct voltage-domain compensation technique. The rectifier maintains high efficiency during load and link variations required for downlink communication. The system was fabricated in 40nm …

Published in: IEEE Solid-State Circuits Letters
Page(s): 305 – 308
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3611484
Publisher: IEEE

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