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A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms

A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms 150 150
Author(s): Javier Diaz-Fortuny, Erik Bury, Robin Degraeve, Ben Kaczer

Abstract:

Ring-oscillator (RO) circuits have historically been used to characterize the performance of CMOS technologies, as they can easily expose both process variability and aging through a straightforward circuit structure. ROs are widely employed to study degradation mechanisms such as bias temperature instability (BTI) and hot carrier degradation (HCD), which progressively …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3653472
Publisher: IEEE

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A Sub-Threshold Oscillator-Based High-Accuracy Temperature Sensor With Tolerance to Supply Fluctuation and Device Aging

A Sub-Threshold Oscillator-Based High-Accuracy Temperature Sensor With Tolerance to Supply Fluctuation and Device Aging 150 150
Author(s): Wei Wang, Yumin Su, Shayok Dutta, Liwen Jiang, Zhiyu Chen, Zhanghao Yu, Caleb Kemere, Kaiyuan Yang

Abstract:

Accurate, low-power, and compact temperature sensors are demanded in a wide range of biomedical, environmental, and industrial sensing applications. This article presents an accurate and precise CMOS temperature sensor based on a sub-threshold ring oscillator (RO) in 180 nm. The sensing core employs a five-stage super cut-off contention-free (SCCF) delay cell …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3644747
Publisher: IEEE

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Chameleon: A Multiplier-Free Temporal Convolutional Network Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data

Chameleon: A Multiplier-Free Temporal Convolutional Network Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data 150 150
Author(s): Douwe den Blanken, Charlotte Frenkel

Abstract:

On-device learning at the edge enables low-latency, private personalization with improved long-term robustness and reduced maintenance costs. Yet, achieving scalable, low-power (LP) end-to-end on-chip learning, especially from real-world sequential data with a limited number of examples, is an open challenge. Indeed, accelerators supporting error backpropagation optimize for learning performance at …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3645640
Publisher: IEEE

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An Approximate Digital CIM Macro With Low-Power Multiply-Add Units and Dynamic Sparse-Adaptive Configuring for Edge AI Inference

An Approximate Digital CIM Macro With Low-Power Multiply-Add Units and Dynamic Sparse-Adaptive Configuring for Edge AI Inference 150 150
Author(s): Xiaofeng Li, Yi Zhan, Purui Zhu, Rui Zhou, Jiayin Song, Heng You, Yumei Zhou, Shushan Qiao

Abstract:

This letter presents an approximate digital compute-in-memory (CIM) macro for low-power edge AI inference. It introduces three hierarchical innovations: 1) novel fused approximate multiply-add units (FAMUs) that reduces power and area consumption; 2) a bit-critical weight allocation architecture that optimally balances accuracy and hardware cost; and 3) a dynamic sparsity-adaptive configuration method to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 45 – 48
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3652570
Publisher: IEEE

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A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers

A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers 150 150
Author(s): Chen Hu, Xinran Huang, Xun Liu, Sijun Du, Xiaosen Liu, Junmin Jiang

Abstract:

This article presents a step-up switched-capacitor (SC) sigma converter with fast transient, high efficiency, and high accuracy for light detection and ranging (LiDAR) receiver applications. The proposed sigma converter combines an unregulated SC converter in the high-voltage (HV) domain and a low-dropout (LDO) regulator in the low-voltage (LV) domain, achieving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3645413
Publisher: IEEE

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A Cryo-CMOS Smart Temperature Sensor for the Ultrawide Temperature Range From 5 K to 296 K

A Cryo-CMOS Smart Temperature Sensor for the Ultrawide Temperature Range From 5 K to 296 K 150 150
Author(s): D. Cerviño Fungueiriño, L. A. Enthoven, J. van Staveren, M. Babaie, F. Sebastiano

Abstract:

This work presents a cryo-CMOS smart temperature sensor operating from room temperature down to 5 K. By adopting sensing elements (CMOS bulk diodes, pMOS/DTMOS in weak inversion) that circumvent the poor cryogenic performance of Si BJTs, a robust switched-capacitor second-order sigma–delta readout and cryogenic-aware design techniques, the sensor achieves …

Published in: IEEE Solid-State Circuits Letters
Page(s): 29 – 32
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3650657
Publisher: IEEE

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A 28-nm FeFET Compute-in-Memory Macro With 64×64 Array Size and On-Chip 4-Bit Flash ADC

A 28-nm FeFET Compute-in-Memory Macro With 64×64 Array Size and On-Chip 4-Bit Flash ADC 150 150
Author(s): Vaidehi Garg, Jianwei Jia, Omkar Phadke, Shimeng Yu

Abstract:

Compute-in-memory (CIM) using emerging nonvolatile memory devices is a promising candidate for energy-efficient deep neural network (DNN) inference at the edge. Ferroelectric field-effect transistors (FeFETs) have recently gained attention as nonvolatile, CMOS-compatible devices with a higher on/off ratio and lower read and write energy compared to resistive random-access memory (…

Published in: IEEE Solid-State Circuits Letters
Page(s): 13 – 16
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3640522
Publisher: IEEE

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SparseCol: A 1320 BTOPS/W Precision-Scalable NPU Exploiting Training-Free Structured Bit-Level Sparsity and Dynamic Dataflow

SparseCol: A 1320 BTOPS/W Precision-Scalable NPU Exploiting Training-Free Structured Bit-Level Sparsity and Dynamic Dataflow 150 150
Author(s): Man Shi, Vikram Jain, Weijie Jiang, Chao Fang, Antony Joseph, Wim Dehaene, Marian Verhelst

Abstract:

Bit-serial computation enables sequential processing of data at the bit level, providing several advantages, such as scalable computational precision. This approach has gained significant attention, especially for exploiting bit-level sparsity (BLS) in AI workloads. While current bit-serial processors leverage BLS to eliminate the computation associated with zero bits, they face …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3636451
Publisher: IEEE

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Advancing On-Cell Near-Field Monitoring for Thermal Runaway Detection in EV Batteries

Advancing On-Cell Near-Field Monitoring for Thermal Runaway Detection in EV Batteries 150 150
Author(s): Simon Foster, Scott Block, Daniel McMitchell, Edgar Colin-Beltran, Robert Dailey

Abstract:

A cell monitoring system for performance and safety enhancement is presented. It is the first commercially available single-chip-on-cell near-field contactless solution for automotive battery management, simplifying pack interconnect and reducing points of failure. This letter is a companion paper to the earlier ISSCC paper. It provides further details on the …

Published in: IEEE Solid-State Circuits Letters
Page(s): 369 – 372
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3634340
Publisher: IEEE

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