Announcing Inaugural IEEE Journal of Solid-State Circuits Test of Time Awardhttps://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg150150dmarinesedmarinesehttps://secure.gravatar.com/avatar/073941c3ddf49696287226b2e952992650de3bb8108e95d4acd06e520e251aaf?s=96&d=mm&r=g
Announcing SEED: Semiconductor Education, Empowerment, and Industry Developmenthttps://sscs.ieee.org/wp-content/uploads/IEEE-SSCS-EDS-SEED-Program-1.png12001200David TadrosDavid Tadroshttps://secure.gravatar.com/avatar/704c65302a0a14eada3279392f61432f228d0c8243f6c3d87c4bc2ba38038488?s=96&d=mm&r=g
Welcome, New Vice President of the Publications Committee
SSCS is pleased to welcome Waleed Khalil as Vice President of the Publications Committee. Waleed has served the society in multiple capacities, including as Associate Vice President of Publications and Editor-in-Chief of the RFIC Virtual Journal.
We thank Shanthi Pavan, outgoing Publications Vice President, for his years of service to the committee and dedicated stewardship of our publications portfolio.
Waleed Khalil
Vice President, Publications Committee
Welcome, New Editor-in-Chief of JSSC
At the Journal of Solid-State Circuits (JSSC), Boris Murmann has assumed the role of Editor-in-Chief. Boris was most recently Chair of SSCS’s Technical Committee on the Open-Source Ecosystem (TC-OSE), establishing our successful Platform for IC Design Outreach (PICO) program.
We thank Dennis Sylvester, outgoing Editor-in-Chief, for his years of service growing JSSC and establishing two new author awards.
Boris Murmann
Editor-in-Chief, Journal of Solid-State Circuits (JSSC)
Solid-State Circuits Magazine Wins 2025 APEX Award of Excellence!
We’re proud to share that the Fall 2024 issue of IEEE Solid-State Circuits Magazine (Vol. 14, No. 4 – Women in Circuits) has been honored with a 2025 APEX Award of Excellence in the category Magazines, Journals & Tabloids – Writing.
Congratulations to:
Leo Belostotski, Professor
Shanthi Pavan, Professor
Bill Bowhill, SSCS President
And the magazine’s staff, authors, and editors for their incredible contributions to this award-winning issue.
Calling the Next Generation of Circuit Designers!https://sscs.ieee.org/wp-content/uploads/NextGen-Circuit-Designer-1-2.png12001200David TadrosDavid Tadroshttps://secure.gravatar.com/avatar/704c65302a0a14eada3279392f61432f228d0c8243f6c3d87c4bc2ba38038488?s=96&d=mm&r=g
Are you ready to shape the future of circuits and systems?
The 2026 Next Gen Circuit Designer Workshop, hosted by IEEE SSCS Women in Circuits (WiC), will bring together students and young professionals for a one-day program filled with mentorship, networking, and career-building opportunities.
From interactive poster sessions to a dynamic career panel at ISSCC 2026, this workshop is designed to connect tomorrow’s innovators with today’s leaders in circuit design.
IEEE SSCS Awards – Now Open for Nominations! Deadline: October 15, 2025https://sscs.ieee.org/wp-content/uploads/Society-Awards.png940788David TadrosDavid Tadroshttps://secure.gravatar.com/avatar/704c65302a0a14eada3279392f61432f228d0c8243f6c3d87c4bc2ba38038488?s=96&d=mm&r=g
Corrections to “Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation”https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg150150https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Author(s): Mohammadreza Zeinali, Sudhakar Pamarti
Abstract:
This article provides a correction to an error in our previously published manuscript. The correction pertains to the transfer function representation of the main fractional frequency synthesizer structure and its associated components. In addition, the root locus analysis requires revision based on this correction. These modifications do not affect the …
Published in: IEEE Journal of Solid-State Circuits Page(s): 1882 – 1882 Year of Publication: 2025 Electronic ISSN: 1558-173X DOI: 10.1109/JSSC.2025.3550254 Publisher: IEEE
Corrections to “Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation”https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg150150https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Author(s): Mohammadreza Zeinali, Sudhakar Pamarti
Abstract:
This article provides a correction to an error in our previously published manuscript. The correction pertains to the transfer function representation of the main fractional frequency synthesizer structure and its associated components. In addition, the root locus analysis requires revision based on this correction. These modifications do not affect the …
Published in: IEEE Journal of Solid-State Circuits Page(s): 1882 – 1882 Year of Publication: 2025 Electronic ISSN: 1558-173X DOI: 10.1109/JSSC.2025.3550254 Publisher: IEEE
Corrections to “Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation”https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg150150https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Author(s): Mohammadreza Zeinali, Sudhakar Pamarti
Abstract:
This article provides a correction to an error in our previously published manuscript. The correction pertains to the transfer function representation of the main fractional frequency synthesizer structure and its associated components. In addition, the root locus analysis requires revision based on this correction. These modifications do not affect the …
Published in: IEEE Journal of Solid-State Circuits Page(s): 1882 – 1882 Year of Publication: 2025 Electronic ISSN: 1558-173X DOI: 10.1109/JSSC.2025.3550254 Publisher: IEEE
Corrections to “Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation”https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg150150https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Author(s): Mohammadreza Zeinali, Sudhakar Pamarti
Abstract:
This article provides a correction to an error in our previously published manuscript. The correction pertains to the transfer function representation of the main fractional frequency synthesizer structure and its associated components. In addition, the root locus analysis requires revision based on this correction. These modifications do not affect the …
Published in: IEEE Journal of Solid-State Circuits Page(s): 1882 – 1882 Year of Publication: 2025 Electronic ISSN: 1558-173X DOI: 10.1109/JSSC.2025.3550254 Publisher: IEEE
