IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Leveraging a passive MRAM crossbar for hardware-in-the-loop and continual learning

Leveraging a passive MRAM crossbar for hardware-in-the-loop and continual learning 150 150

Abstract:

Artificial neural networks have enabled major advances in artificial intelligence, yet their growing computational and energy demands challenge conventional von Neumann architectures due to the costly separation of memory and processing. In-memory computing has emerged as a promising solution, particularly through memristive crossbar arrays capable of performing multiply-and-accumulate operations directly …

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OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication

OISMA: On-the-Fly In-Memory Stochastic Multiplication Architecture for Approximate Matrix Multiplication 150 150

Abstract:

Artificial intelligence (AI) models are currently driven by a significant upscaling of their complexity, with massive matrix-multiplication workloads representing the major computational bottleneck. In-memory computing (IMC) architectures are proposed to avoid the von Neumann bottleneck. However, both digital/binary-based and analog IMC architectures suffer from various limitations, which significantly degrade …

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P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments

P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments 150 150

Abstract:

The frequency assignment problem is a nondeterministic polynomial-time hard (NP-hard) optimization problem concerning the assignment of frequency channels to wireless transmitters. Typically, the aim is to minimize interference between transmitters while maintaining a high level of service. In this work, the use of probabilistic d-dimensional bits, or p-dits, for this …

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1-Transistor-Dynamic Random Access Memory as Reservoir for Temporal Signal Processing

1-Transistor-Dynamic Random Access Memory as Reservoir for Temporal Signal Processing 150 150

Abstract:

Reservoir computing (RC), a computational paradigm inspired by the recurrent neural networks (RNNs), offers a promising framework for efficient temporal processing with minimal training overhead. Hardware implementation of RC primitive requires devices that exhibit short-term memory, nonlinearity, and energy-efficient state-switching dynamics. While emerging nonvolatile memory (eNVM) technologies have been explored …

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Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture

Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture 150 150

Abstract:

Spin-transfer torque magnetic tunnel junction (STT-MTJ) is widely recognized as a promising device for computation-in-memory (CIM) architecture due to its advantages, such as simple nonvolatile structure, CMOS compatibility, and scalability. In spite of the advantages, achieving reliable and efficient sensing of STT-MTJ remains a design challenge. This work presents a …

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A CMOS Probabilistic Computing Chip With Hardware-Aware Learning

A CMOS Probabilistic Computing Chip With Hardware-Aware Learning 150 150

Abstract:

This work demonstrates a compact probabilistic computing system based on a physics-inspired probabilistic bit (p-bit) architecture with 440 interacting spins configured in a chimera graph and occupying 0.44 mm2 of silicon area. Area efficiency is achieved through a current-mode neuron update circuit and a mixed-signal design approach that integrates pitch-matched standard-cell analog …

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Benchmarking of Emerging Material-Based TCAMs

Benchmarking of Emerging Material-Based TCAMs 150 150

Abstract:

This work presents a comprehensive benchmarking of ternary content-addressable memory (TCAM) implementations using timing-accurate SPICE simulations, systematically comparing conventional CMOS designs with emerging device technologies, including magnetic tunnel junctions (MTJs), ferroelectric tunnel junctions (FTJs), ferroelectric field-effect transistors (FeFETs), and 2-D reconfigurable field-effect transistors (2D RFETs). Key performance metrics, including search …

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The Impact of Magnetic Field on Defective FDSOI and FinFET Devices

The Impact of Magnetic Field on Defective FDSOI and FinFET Devices 150 150

Abstract:

This article explores the efficacy of a unique defect detection mechanism for the FinFET and FDSOI transistors: magnetomodulation of drain current. Using multiphysics technology CAD (TCAD), we model the impact of static and transient magnetic fields on drain current in the following defect-free and defective devices: 1) FDSOI with interface trap …

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Antiferromagnetic Programmable Neuron: Structure, Training, and Pattern Recognition Applications

Antiferromagnetic Programmable Neuron: Structure, Training, and Pattern Recognition Applications 150 150

Abstract:

Artificial neurons based on antiferromagnetic (AFM) spin Hall oscillators (SHOs) are promising elements for creating ultrafast, energy-efficient neuromorphic computing systems. These structures can generate picosecond spikes in response to dc and ac electric currents, thereby mimicking the reaction of biological neurons to an external stimulus. However, conventional AFM neurons have …

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