Wideband

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Design and Analysis of a 13.7–41 GHz Ultra-Wideband Frequency Doubler With Cross-Coupled Push-Push Structure

Design and Analysis of a 13.7–41 GHz Ultra-Wideband Frequency Doubler With Cross-Coupled Push-Push Structure 150 150
Author(s): Kai Li, Keping Wang, Fanyi Meng, Kiat Seng Yeo, Kaixue Ma

Abstract:

This article presents a 13.7–41 GHz ultra-wideband frequency doubler with high efficiency and conversion gain (CG). The proposed cross-coupled push-push structure, in conjunction with the fourth-order transformer-based resonator and the series gate inductor, collaboratively shapes the input signal amplitude such that three distinct peaks emerge at different frequencies, thereby significantly improving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3667289
Publisher: IEEE

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A K/Ka-Band Transmit/Receive Front-End With Triple-Coupled Transformer Technique in 65-nm Bulk CMOS

A K/Ka-Band Transmit/Receive Front-End With Triple-Coupled Transformer Technique in 65-nm Bulk CMOS 150 150
Author(s): Nayu Li, Ziyao Xiong, Botao Yang, Hang Lu, Yiwei Liu, Xiaokang Qi, Gaopeng Chen, Na Yan, Chunyi Song, Zhiwei Xu

Abstract:

This article presents a K/Ka-band transmit/receive (T/R) front-end for jointed sensing and communication (JSAC) applications. A reconfigurable matching network for both signal reception and transmission is realized using the proposed triple-coupled transformer (TCT) technique, achieving low power loss and a compact footprint. The T/R switch at …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3667736
Publisher: IEEE

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Sub-Terahertz Wideband ASK Transceiver for 14/27/64 Gb/s 0.27-km/0.12-m/0.1-mm Interconnection in 28-nm CMOS

Sub-Terahertz Wideband ASK Transceiver for 14/27/64 Gb/s 0.27-km/0.12-m/0.1-mm Interconnection in 28-nm CMOS 150 150
Author(s): Dawei Tang, Xiaoyue Xia, Leyang Huang, Zekun Li, Chun Yang, Zheng Yan, Si-Yuan Tang, Peigen Zhou, Rui Zhang, Liqun Lu, Wentao Zhu, Zhe Chen, Jixin Chen, Hao Gao, Wei Hong

Abstract:

This article presents a 28-nm CMOS sub-terahertz (sub-THz) amplitude shift-keying (ASK) transceiver achieving competitive wireless and wireline communication performance. The over-the-air (OTA) link demonstrates 14 Gb/s/0.27 km, 16Gb/s/1m, and 27 Gb/s/12 cm without equalization (EQ), while supporting 64 Gb/s on-Off keying (OOK) and 40 Gb/s pulse amplitude modulation (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3665552
Publisher: IEEE

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A Compact Reconfigurable Dual-Path Dual-Band LNA for 5G NR FR2 Applications

A Compact Reconfigurable Dual-Path Dual-Band LNA for 5G NR FR2 Applications 150 150
Author(s): Pei Qin, Junyu Wu, Taotao Xu, Yongchun Li, Wenjie Feng, Quan Xue, Wenquan Che

Abstract:

This article presents a reconfigurable dual-path dual-band low noise amplifier (LNA) for fifth generation (5G) millimeter-wave (mmW) communications. A novel band-switching input matching architecture based on the cross-connected transistors is proposed to achieve optimal dual-band input matching and $g_{m}$ -boosting. This architecture allows the dual-band input transistors to share …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3661593
Publisher: IEEE

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A High-Power Wideband Sub-THz Power Amplifier With Asymmetric Slotline-Based Series–Parallel Combiner in 130-nm SiGe BiCMOS Technology

A High-Power Wideband Sub-THz Power Amplifier With Asymmetric Slotline-Based Series–Parallel Combiner in 130-nm SiGe BiCMOS Technology 150 150
Author(s): Gunwoo Park, Hyunjoon Kim, Sanggeun Jeon

Abstract:

This article presents a high-power, wideband sub-terahertz power amplifier (PA) implemented in a 130-nm SiGe BiCMOS technology. The PA features a novel asymmetric slotline-based series–parallel combiner (ASSPC) for output power combining. The ASSPC provides both low-loss, wideband combining and efficient admittance matching for four differential cascode PA unit cells, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3656477
Publisher: IEEE

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A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays

A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays 150 150
Author(s): Mohamed Eleraky, Tzu-Yuan Huang, Hua Wang

Abstract:

This article proposes a design methodology for achieving intrinsic performance resilience in power amplifiers (PAs) against antenna impedance variations inherent to modern phased-array systems through the improvement of the PA output matching ( $S!_{22}$ ). This goal, however, presents a challenge for conventional cascode PAs due to their inherently high output impedance …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3654669
Publisher: IEEE

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0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis

0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis 150 150
Author(s): Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Yuhao Yuan, Qun Jane Gu

Abstract:

This article presents a new system design and in-depth analysis of a wideband, low-power passive imaging receiver based on a Dicke-switch architecture, implemented in 28 nm CMOS technology. The proposed structure employs a three-coil gm-boosting technique for the low-noise amplifier (LNA). This approach reduces the LNA’s noise figure (NF) and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 830 – 846
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3646943
Publisher: IEEE

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A 200 GHz Wideband and Low-Power Direct-Downconversion Receiver Element in 16 nm FinFET Technology

A 200 GHz Wideband and Low-Power Direct-Downconversion Receiver Element in 16 nm FinFET Technology 150 150
Author(s): Ethan Chou, Hesham Beshary, Nima Baniasadi, Ali M. Niknejad

Abstract:

This letter presents a wideband and low-power direct-downconversion 200 GHz receiver element for digital-beamforming applications implemented in 16 nm FinFET technology. Wideband and low integrated receiver noise figure of 9.8 dB across a 21 GHz baseband bandwidth is realized with a differential low-noise amplifier leveraging an active input balun stage, while wideband gain of 29 …

Published in: IEEE Solid-State Circuits Letters
Page(s): 349 – 352
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3626442
Publisher: IEEE

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Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs

Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs 150 150
Author(s): Xingyu Ma, Wei Li, Shijiao Dong, Ruiyu Lyu, Fan Chen, Yunyou Pu, Chuangguo Wang, Hongtao Xu

Abstract:

Wideband self-interference cancellation (SIC) in a full-duplex (FD) system requires the cancellers to achieve flat nanosecond-scale RF delay while minimizing the noise penalty to the receiver (RX). This work proposes: 1) cascadable hybrid low-noise first-order all-pass filters (APFs) in the first tap of the RF canceller to reduce the noise figure (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3618610
Publisher: IEEE

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