Transmitters

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P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments

P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments 150 150
Author(s): Christian Duffee, Jordan Athas, Igor Kadota, Randall Berry, Pedram Khalili Amiri

Abstract:

The frequency assignment problem is a nondeterministic polynomial-time hard (NP-hard) optimization problem concerning the assignment of frequency channels to wireless transmitters. Typically, the aim is to minimize interference between transmitters while maintaining a high level of service. In this work, the use of probabilistic d-dimensional bits, or p-dits, for this …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 78 – 85
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690563
Publisher: IEEE

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A 129–146-GHz Direct-Digital Modulation FinFET Transmitter With On-Chip Mismatch Calibrations for Beyond-5G Wireless Communications

A 129–146-GHz Direct-Digital Modulation FinFET Transmitter With On-Chip Mismatch Calibrations for Beyond-5G Wireless Communications 150 150
Author(s): Runzhou Chen, Hao-Yu Chien, Boxun Yan, Chao-Jen Tien, Mau-Chung Frank Chang

Abstract:

This article presents a D-band direct-digital modulation (DDM) transmitter with on-chip digital calibration blocks for future beyond-5G (B5G) wireless communication. The proposed DDM architecture mitigates the need for complex intermediate frequency (IF) generation and power-hungry digital-to-analog converters (DACs). The transmitter is implemented primarily in TSMC’s 16-nm p-FinFETs, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1776 – 1790
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3644224
Publisher: IEEE

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A Quadrature-Rotation Phased-Array Transmitter With High-Resolution Phase Tuning and Complex Domain Power Back-Off Efficiency Enhancement

A Quadrature-Rotation Phased-Array Transmitter With High-Resolution Phase Tuning and Complex Domain Power Back-Off Efficiency Enhancement 150 150
Author(s): Jie Zhou, Bingzheng Yang, Hongxin Tang, Xun Luo

Abstract:

In this article, a four-element digital-modulated phased-array transmitter based on quadrature switched/floated-capacitor power amplifiers (SFCPAs) and reconfigurable switched-capacitor tuning lines (RSCTLs) is proposed. Phase shifting in each element is achieved by hybrid coarse and fine phase-tuning approaches. The SFCPAs with the quadrature-rotation technique are presented for coarse phase tuning. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3702007
Publisher: IEEE

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A 7-Level 18-Wire-State Trio-Signaling Transmitter for MIPI C-PHY 3.0 Interfaces

A 7-Level 18-Wire-State Trio-Signaling Transmitter for MIPI C-PHY 3.0 Interfaces 150 150
Author(s): Junyeong Lee, Myeongjin Oh, Kiwoon Kim, Jung-Hoon Chun

Abstract:

This letter presents a MIPI C-PHY v3.0 TX, which adopts trio-signaling using three wires per lane. Each line supports seven-level signaling, enabling 18 wire states to map 32-bit data into nine symbols, achieving 3.56 bits/symbol efficiency. Balanced coding maintains constant driver current, enhancing SSO noise immunity, and embedded clocking is achieved …

Published in: IEEE Solid-State Circuits Letters
Page(s): 101 – 104
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3672642
Publisher: IEEE

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A 0.29 pJ/b 5.27 Tb/s/mm UCIe Advanced Package Link With 2.5-D CoWoS Interposer and a 0.52 pJ/b 0.448 Tb/s/mm UCIe Standard Package Link With Organic Substrate in 3 nm FinFET

A 0.29 pJ/b 5.27 Tb/s/mm UCIe Advanced Package Link With 2.5-D CoWoS Interposer and a 0.52 pJ/b 0.448 Tb/s/mm UCIe Standard Package Link With Organic Substrate in 3 nm FinFET 150 150
Author(s): Didem Turker Melek, James Vandersand, R. Navin Kumar, Pyare M. Sarkar, Prakash BS, Adrian Leuciuc, Kevin Geary, Shaojun Ma, Chirag M. Mehta, Basant Bothra, Shashi Jain, Pawan Sabharwal, Ranjan Vaish, Kirti Bhanushali, Yutong Ding, Craig Frost, John Annunziata, Krishanu Sadhu, Dimitris Kyritsis, Jeff Bostak, Ming Li, Steve Williams, Ken Chang

Abstract:

This work presents two die-to-die (D2D) wireline transceivers, one compliant with the UCIe advanced package (UCIe-AP) and the other with the UCIe standard package (UCIe-SP) standard, developed in 3 nm FinFET. The Universal Chiplet interconnect express (UCIe)-AP link has 64 RX and 64 TX data lanes in one PHY module and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3651425
Publisher: IEEE

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A Millimeter-Wave Direct Digital Transmitter Using Multiphase Subharmonic Switching PA

A Millimeter-Wave Direct Digital Transmitter Using Multiphase Subharmonic Switching PA 150 150
Author(s): Soumya Mahapatra, Mostafa Ayesh, Ce Yang, Mayank Palaria, Shiyu Su, Aoyang Zhang, Mike Shuo-Wei Chen

Abstract:

This article presents a direct digital transmitter (TX) employing a multiphase subharmonic switching (MP-SHS) power amplifier (PA) to achieve both high peak and power back-off (PBO) efficiency with wide signal bandwidth. A phase-shifted subharmonic (SH) local oscillator (LO) divider is proposed to suppress SH spurs with minimal implementation overhead by …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3605564
Publisher: IEEE

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A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS

A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS 150 150
Author(s): Chun-Sheng Lin, Chih-Hsueh Lin, Chun-Hsing Li

Abstract:

A 240-GHz direct-conversion transmitter (TX), consisting of an LO chain and fundamental I/Q mixers, is proposed for sub-THz communication applications. The LO chain integrates phase-shifter-embedded impedance matching networks (IMNs) and frequency tripler with an optimized harmonic IMN, delivering I/Q LO signals at 240 GHz with high output power, 360° phase …

Published in: IEEE Solid-State Circuits Letters
Page(s): 225 – 228
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3592246
Publisher: IEEE

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A 0.7-V Multiclass Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22-nm CMOS

A 0.7-V Multiclass Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22-nm CMOS 150 150
Author(s): Edoardo Baiesi Fietta, David Seebacher, Davide Ponton, Andrea Bevilacqua

Abstract:

This letter presents a multiclass, asymmetric digital Doherty power amplifier (DDPA) for Bluetooth low energy (BLE) applications, that achieves high efficiency at full-scale as well as at 8.6-dB back-off using a single 0.7-V supply voltage. The proposed DDPA is made of two power-combined switched-capacitor power amplifiers (SCPAs) and uses an …

Published in: IEEE Solid-State Circuits Letters
Page(s): 217 – 220
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3591570
Publisher: IEEE

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