Transceivers

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A 4 × 224 Gb/s Single-Ended PAM-4 Transceiver Front-End With Noise Suppression Technique and Cascaded Equalizers in 130-nm SiGe BiCMOS

A 4 × 224 Gb/s Single-Ended PAM-4 Transceiver Front-End With Noise Suppression Technique and Cascaded Equalizers in 130-nm SiGe BiCMOS 150 150
Author(s): Xiongshi Luo, Xuewei You, Zhenghao Li, Hongzhi Wu, Yangyi Zhang, Fuzhan Chen, Xuxu Cheng, Wentao Zhou, Quan Pan

Abstract:

A dc-coupled analog single-ended (SE) transceiver (TRX) front-end supporting 224 Gb/s/lane is presented. It features SE-to-differential (S2D) and differential-to-SE (D2S) conversion, power-efficient broadband analog equalization, and noise suppression. Both the transmitter and receiver front-ends adopt pseudodifferential structures with dual-loop regulators to achieve a high power supply rejection …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 10
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3644437
Publisher: IEEE

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A Machine Learning-Inspired PAM-4 Transceiver for Medium-Reach Wireline Links

A Machine Learning-Inspired PAM-4 Transceiver for Medium-Reach Wireline Links 150 150
Author(s): Ramin Javadi, Tejasvi Anand

Abstract:

This article presents an energy-efficient machine learning-inspired PAM-4 wireline transceiver that leverages data encoding at the transmitter (Tx) and feature extraction with classification at the receiver (Rx) to compensate for channel loss ranging from 13 to 26 dB, while maintaining the bit error rate (BER)<10-11. A new consecutive symbol-to-center (CSC) encoding …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3616072
Publisher: IEEE

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A Fully Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication

A Fully Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication 150 150
Author(s): Lucrezia Navarin, Karl Norling, Marco Parenzan, Stefano Ruzzu, Andrea Neviani, Andrea Bevilacqua

Abstract:

A fully integrated galvanic isolator for gate drivers that supports high-speed, asynchronous, full-duplex communication is presented. Data transmission from the microcontroller to the power device is achieved using amplitude-shift keying (ASK) at 100 Mb/s, while simultaneous communication in the opposite direction is implemented using frequency-shift keying (FSK) at 167 Mb/s. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 289 – 292
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3611018
Publisher: IEEE

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An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm

An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm 150 150
Author(s): Chang Liu, Burak Catli, Yong Liu, Anand Vasani, Guansheng Li, Kun Chuai, Lakshmi Rao, Yang Liu, Xin Meng, Jiawen Zhang, Tim He, Batu Dayanik, Vadim Milirud, Meisam Honarvar Nazari, Hyo Gyuem Rhew, Derui Kong, Arvindh Iyer, Nan Wang, Alireza Nilchi, Aminghasem Safarian, Ray Wang, Hyung-Joon Jeon, Xiaochen Yang, Boyu Hu, Jerry Han, Adesh Garg, Kumar Thasari, Heng Zhang, Namik Kocaman, Ali Nazemi, Delong Cui, Afshin Momtaz, Jun Cao

Abstract:

This work presents a low power DSP-based single-chip 800GbE PAM-4 PHY transceiver in 7 nm process capable of driving eight lanes of up to 112-Gb/s. It supports both electrical and optical links with monolithic integrated laser driver enabling direct-drive PAM-4 output capability for EML and silicon photonics. The transceiver supports 42 …

Published in: IEEE Solid-State Circuits Letters
Page(s): 281 – 284
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3608134
Publisher: IEEE

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A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers

A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers 150 150
Author(s): Chenxin Liu, Yudai Yamazaki, Anyi Tian, Chun Wang, Hans Herdian, Abanob Shehata, Han Nie, Minzhe Tang, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This work presents a D-band bi-directional CMOS double-balanced mixer (DBM) supporting data rates over 160 Gb/s with a 58-GHz RF bandwidth (112–170 GHz). The mixer employs four identical NMOS passive switches ( $12~\mu $ m/60 nm) in a DBM topology, providing the isolation between RF, LO, and IF ports. Both IF and RF …

Published in: IEEE Solid-State Circuits Letters
Page(s): 241 – 244
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3597690
Publisher: IEEE

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