Threshold voltage

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An 11.95-ENOB 560-MS/s Amplifier-Switching Subranging Analog-to-Digital Converter With Multi-Threshold Comparators

An 11.95-ENOB 560-MS/s Amplifier-Switching Subranging Analog-to-Digital Converter With Multi-Threshold Comparators 150 150
Author(s): Ritaro Takenaka, Tetsuya Iizuka

Abstract:

This article proposes a 14-bit, 560-MS/s subranging analog-to-digital converter (ADC) that employs an amplifier-switching architecture with multi-threshold comparators. The proposed amplifier-switching architecture reuses a flash quantizer multiple times during subranging conversion by amplifying the residue voltage with an appropriate gain at each quantization step. This approach reduces the required …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3647024
Publisher: IEEE

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A 3-nm FinFET 563-kbit 35.5-Mbit/mm2 Dual-Rail SRAM With 3.89-pJ/Access High Energy Efficient and 27.5-μW/Mbit One-Cycle Latency Low-Leakage Mode

A 3-nm FinFET 563-kbit 35.5-Mbit/mm2 Dual-Rail SRAM With 3.89-pJ/Access High Energy Efficient and 27.5-μW/Mbit One-Cycle Latency Low-Leakage Mode 150 150
Author(s): Yumito Aoyagi, Koji Nii, Makoto Yabuuchi, Tomotaka Tanaka, Kazuto Mizutani, Masaya Hamada, Yuichiro Ishii, Yen Chi Chou, Jun Cheng Liu, Chien-Yu Huang, Kang-Hui Peng, Yu-Hao Hsu, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

Abstract:

This article presents a high-density (HD) 6T SRAM macro designed in 3-nm FinFET technology with an extended dual-rail (XDR) architecture, addressing active energy and leakage for mobile applications. Two key innovations are introduced: the delayed-wordline in write operation (DEWL) technique and a one-cycle latency low-leakage access mode (1-CLM). The XDR …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3639747
Publisher: IEEE

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A Benchmark of Cryo-CMOS Dynamic Comparators in a 40 nm Bulk CMOS Technology

A Benchmark of Cryo-CMOS Dynamic Comparators in a 40 nm Bulk CMOS Technology 150 150
Author(s): Bram Veraverbeke, Filip Tavernier

Abstract:

All cryo-CMOS quantum-classical control interfaces require an analog-to-digital converter (ADC) bridging the analog qubits and the digital control logic. Dynamic comparators play a crucial role in the precision, speed, and power consumption of these ADCs. Yet, their performance is severely impacted by the cryogenic environment. Therefore, this letter benchmarks, for …

Published in: IEEE Solid-State Circuits Letters
Page(s): 317 – 320
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3618161
Publisher: IEEE

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High-Entropy Analog-Based Strong Physical Unclonable Function With Area-to-Entropy-ratio of 166 F2/bit

High-Entropy Analog-Based Strong Physical Unclonable Function With Area-to-Entropy-ratio of 166 F2/bit 150 150
Author(s): Alessandro Catania, Sebastiano Strangio, Maksym Paliy, Christian Sbrana, Michele Bertozzi, Giuseppe Iannaccone

Abstract:

In this letter, we present a high-entropy strong physically unclonable function (PUF) utilizing weak-inversion current mirrors implemented in a standard 65-nm CMOS technology. Each response bit of the proposed PUF relies on the threshold voltage differences of minimum-sized transistors arranged in a $32\times 32$ matrix. The analog operating principle enables encoding …

Published in: IEEE Solid-State Circuits Letters
Page(s): 309 – 312
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3616263
Publisher: IEEE

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An 8.5 MHz 42 ppm/°C Relaxation Oscillator With Charge-Pump Delay Cancellation and Digital Chopping Demodulation

An 8.5 MHz 42 ppm/°C Relaxation Oscillator With Charge-Pump Delay Cancellation and Digital Chopping Demodulation 150 150
Author(s): Yongjia Li, Jianlin Xia, Feng Cheng, Yifan Cao, Jin Wu, Encheng Zhu, Xiaofeng Sun, Dejin Wang, Long Zhang, Zhongyuan Fang, Weifeng Sun

Abstract:

This letter presents an RC oscillator featuring a mixed-signal compensation loop that simultaneously mitigates comparator offset, loop delay, switch on-resistance, and temperature dependency. The oscillator employs an auxiliary comparator, a charge pump, and a differential difference amplifier (DDA)-based main comparator to suppress ramping voltage overshoots caused by device and …

Published in: IEEE Solid-State Circuits Letters
Page(s): 333 – 336
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3615833
Publisher: IEEE

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FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability

FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability 150 150
Author(s): Mohammad Khairul Bashar, T. H. Pantha, Z. Li, M. Farasat, S. Datta, V. Narayanan, S. Dutta, N. Shukla

Abstract:

In-memory compute kernels present a promising approach for addressing data-centric workloads. However, their scalability—particularly for computationally intensive tasks solving combinatorial optimization problems such as Boolean satisfiability (SAT), which are inherently difficult to decompose—remains a significant challenge. In this work, we propose a ferroelectric nonvolatile memory (NVM)-based compute-in-memory …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 81 – 89
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3603942
Publisher: IEEE

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LIF Neuron Based on a Charge-Powered Ring Oscillator in Weak Inversion Achieving 201 fJ/SOP

LIF Neuron Based on a Charge-Powered Ring Oscillator in Weak Inversion Achieving 201 fJ/SOP 150 150
Author(s): Javier Granizo, Ruben Garvi, Ricardo Carrero, Luis Hernandez

Abstract:

This letter presents the experimental results of a leaky-integrate-and-fire neuron (LIF) neuron based on time-domain analog circuitry. This kind of neuron is the core of spiking neural network (SNN) used in edge applications. Edge applications require power-efficient neuron designs whose power consumption is extremely low when idle, and low when …

Published in: IEEE Solid-State Circuits Letters
Page(s): 249 – 252
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3603335
Publisher: IEEE

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Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring

Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring 150 150
Author(s): Jianwei Jia, Zhenge Jia, Omkar Phadke, Yiyu Shi, Shimeng Yu

Abstract:

Implantable cardioverter defibrillators (ICDs) provide real-time monitoring and immediate defibrillation for life-threatening arrhythmias. However, the intracardiac electrogram (IEGM) acquisition of ICDs faces stringent constraints, including power consumption, low-frequency noise, and patient-specific physiological variability. This article introduces an ultralow-power, high-resolution, reconfigurable three-stage bandpass filter designed specifically for IEGM, utilizing ferroelectric field-effect …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 67 – 73
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3584711
Publisher: IEEE

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A 76.9 ppm/K Nano-Watt PVT-Insensitive CMOS Voltage Reference Operating From 4 to 300 K for Integrated Cryogenic Quantum Interface

A 76.9 ppm/K Nano-Watt PVT-Insensitive CMOS Voltage Reference Operating From 4 to 300 K for Integrated Cryogenic Quantum Interface 150 150
Author(s): Jing Wang, Jun He, Man-Kay Law, Xinzhe Wang, Futian Liang, Lin Cheng

Abstract:

This work proposes a temperature and process-compensated low-power Cryo-CMOS voltage reference without trimming for quantum integrated interface, which is capable of operating continuously from room temperature (RT) down to cryogenic temperatures. By compensating for the main accuracy limiting factors including the process dependence of the transistor threshold voltage, device mismatch …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 3242 – 3256
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3530472
Publisher: IEEE

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