Temperature

Self-Heating and Parasitic Effects in Multi-Tier CFET Design

Self-Heating and Parasitic Effects in Multi-Tier CFET Design 150 150

Abstract:

In this article, we study the impact of self-heating effects (SHEs) and middle of line (MOL) and back-end of line (BEOL) induced parasitics on multi-tier CFET design, where multiple nanosheet devices are vertically stacked. We analyze and compare the four-tier complementary FET (CFET) design with the conventional two-tier CFET, using …

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A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm2

A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm2 150 150

Abstract:

In-memory computing (IMC) hardware accelerators for deep neural networks (DNNs) require storing a massive number of coefficients within a single computing macro to avoid performance degradation in multicore clusters. This aspect, often overlooked by common figures of merit (FoMs), can be effectively addressed by phase-change memory (PCM) technology, thanks to …

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Raisu: A Radiation-Tolerant Neuromorphic Imager With In-Pixel Self-Healing and Unified Spiking Processing for Spaceborne Vision

Raisu: A Radiation-Tolerant Neuromorphic Imager With In-Pixel Self-Healing and Unified Spiking Processing for Spaceborne Vision 150 150

Abstract:

Spaceborne imaging systems operate under severe radiation and energy constraints, where single-event effects (SEEs), total ionizing dose (TID), and displacement damage dose (DDD) critically degrade reliability and performance. This work presents a radiation-tolerant neuromorphic imager prototype featuring a fully spike-based neuromorphic vision architecture with in-pixel self-healing capability and an integrated …

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Current-Locked-Loop: A Circuit Topology for Reconfigurable High-Accuracy CMOS References

Current-Locked-Loop: A Circuit Topology for Reconfigurable High-Accuracy CMOS References 150 150

Abstract:

This article introduces a circuit topology for building reconfigurable, high-accuracy CMOS current and voltage references, namely, current-locked-loop (CLL). The CLL regulates the $V_{\mathrm {GS}}$ of a current source transistor and thus its current output using a digitally assisted feedback loop, thereby enabling higher order temperature coefficient (TC) compensation and …

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A 12-Gb/s Source-Synchronous Single-Ended PAM-4 Transceiver With Background Adaptive Crosstalk Equalization in 28-nm CMOS

A 12-Gb/s Source-Synchronous Single-Ended PAM-4 Transceiver With Background Adaptive Crosstalk Equalization in 28-nm CMOS 150 150

Abstract:

This article presents a background adaptive crosstalk (XT) equalization technique for a single-endedfour-level pulse amplitude modulation (PAM-4) interface to maintain accurate XT cancellation (XTC) under environmental variations. A least-mean-square (LMS) adaptation loop adjusts the XT equalizer using a source-synchronous clock as an aggressor reference uncorrelated with the victim. At the …

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A Zero-Static-Power ADC With Integrated Dynamic Reference and Driver-Free Operation Achieving 58.6 dB SNDR From –40 °C to 85 °C

A Zero-Static-Power ADC With Integrated Dynamic Reference and Driver-Free Operation Achieving 58.6 dB SNDR From –40 °C to 85 °C 150 150

Abstract:

This letter presents a 10-bit ENOB charge-sharing SAR ADC with a fully integrated dynamic bandgap reference (BGR), enabling first-order noise shaping and ultralow-power (ULP) operation. The charge-sharing ADC and dynamic BGR form an ideal pair: both operate without static current, allowing compact integration and high precision. The SAR uses only …

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A 6.9-ppm/°C, 0.66-mV/V Line Regulation, 50-mA Multi-Loop Low-Dropout Regulator With Integrated Single-BJT Voltage and Current References

A 6.9-ppm/°C, 0.66-mV/V Line Regulation, 50-mA Multi-Loop Low-Dropout Regulator With Integrated Single-BJT Voltage and Current References 150 150

Abstract:

This article presents a fully integrated output-capacitor-less (OCL) multi-feedback-loop low-dropout regulator (LDO) with an in-built single bipolar junction transistor (BJT)-based voltage and current reference (VCR) for energy-harvesting Internet of Things (IoT) devices. The proposed architecture comprises four loops, which significantly enhance the DC regulation and transient performance of the …

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A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller

A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller 150 150

Abstract:

This article presents a cryogenic quantum interface chipset at 3.5 K for superconducting transmon qubit operations. The chipset comprises a phase-detection readout and a phase-shifter-based polar-modulation controller with flexible scalability. With the proposed phase-detection readout scheme, a 9-bit time-to-digital converter (TDC)-based state detector is used to read out the qubit …

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A High-Linearity Shunt-Based In-Line Current Sensor With Self-Heating Compensation and 14.4 V 2 MHz PWM Rejection

A High-Linearity Shunt-Based In-Line Current Sensor With Self-Heating Compensation and 14.4 V 2 MHz PWM Rejection 150 150

Abstract:

This article presents a cost-effective, fully integrated shunt-resistor-based in-line current sensor that delivers high linearity and strong PWM rejection, enabling precise current measurement and control in dynamic driving systems like robotics, imaging, and audio. To mitigate the self-heating of the on-chip shunt resistor, which degrades linearity, a location-based thermal compensation …

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