Source Design of Vertical III–V Nanowire Tunnel Field-Effect Transistors
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Abstract:
We systematically fabricate devices and analyze data for vertical InAs/(In)GaAsSb nanowire tunnel field-effect transistors (TFETs), to study the influence of source dopant position and level on their device performance. The results show that delaying the introduction of dopants further in the GaAsSb source segments improved the transistor metrics (…