Software

miniSQI: A Compact and Low-Power SQIsign-1D Post-Quantum Digital Signature Verification Accelerator

miniSQI: A Compact and Low-Power SQIsign-1D Post-Quantum Digital Signature Verification Accelerator 150 150

Abstract:

We present the first ASIC demonstration of SQIsign, an isogeny-based NIST-candidate post-quantum digital signature scheme. Our optimized Montgomery modular multiplier circuit design enables 2× speedup and energy savings, while efficient memory organization provides 31% area savings. We implement SQIsign-1D-Uncompressed signature verification in a small form factor with low power consumption suitable …

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A 3 nm FinFET 125 TOPS/W-29 TFLOPS/W, 90 TOPS/mm2-17 TFLOPS/mm2 SRAM-Based INT8, and FP16 Digital-CIM Compiler With Support for Multi-Weight Update/Cycle

A 3 nm FinFET 125 TOPS/W-29 TFLOPS/W, 90 TOPS/mm2-17 TFLOPS/mm2 SRAM-Based INT8, and FP16 Digital-CIM Compiler With Support for Multi-Weight Update/Cycle 150 150

Abstract:

This article presents an static random-access memory (SRAM)-based digital compute-in-memory (CIM) compiler implemented with 3 nm high- $\kappa $ metal gate (HKMG) FinFET technology, supporting flexible INT8 and FP16 formats for weight and activation multiply-accumulate (MAC) operations, offering configuration flexibility, high accuracy, and improved area and power efficiency. The FP16 digital …

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