Sensors

A 1.1-nJ/Conversion RC-Discharge-Based Resistance Sensor With ±0.65% (3σ) 1 -Point Trimmed Inaccuracy in 0.18-μm CMOS Technology

A 1.1-nJ/Conversion RC-Discharge-Based Resistance Sensor With ±0.65% (3σ) 1 -Point Trimmed Inaccuracy in 0.18-μm CMOS Technology 150 150

Abstract:

This letter presents an energy-efficient RC discharge-based sensor readout circuit for sub-kilo-ohm resistance measurements. An SAR logic is implemented to adjust the DAC capacitor array to equalize the RC time constants of the resistance-sensing and DAC branches, thereby eliminating the high static current required to bias the small sensing resistor. …

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A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier

A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier 150 150

Abstract:

This letter presents an energy-efficient dynamic amplifier. It utilizes source-coupled input boosting and time-domain differential sampling techniques to boost the effective input signal by $4\times $ compared to its floating inverter amplifier (FIA) prototype without noise or power penalties. With discharge-based dynamic biasing, the bandwidth (BW) and power of the amplifier …

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A Hybrid Touch Sensing AFE With Common-CVQ (Currents, Voltages, and Charges) Subtraction to Improve Display Noise Immunity for Large Sensing Load

A Hybrid Touch Sensing AFE With Common-CVQ (Currents, Voltages, and Charges) Subtraction to Improve Display Noise Immunity for Large Sensing Load 150 150

Abstract:

On-cell touch flexible organic light-emitting diode (OLED) displays face significant display noise (D-noise) challenges due to large parasitic capacitance ( $C_{P}$ ). To address the limitations of conventional methods, this article proposes improved common-current subtraction (CCS), incorporating common-voltage subtraction (CVS) and common-charge subtraction (CQS) techniques. CVS enhances signal-to-noise ratio (SNR) by …

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A Noise-Shaping SAR-Based ExG Sensing Frontend With Dynamic Input-Impedance Boosting and Prediction-Assisted Mismatch-Shaping DEM

A Noise-Shaping SAR-Based ExG Sensing Frontend With Dynamic Input-Impedance Boosting and Prediction-Assisted Mismatch-Shaping DEM 150 150

Abstract:

This article presents a noise-shaping successive approximation register (NS-SAR)-based direct-digitizing electrophysiological (ExG) sensing frontend (SFE) fabricated in a standard 180-nm CMOS process. To address the challenges of large motion artifacts and high electrode–tissue impedance (ETI), we propose three key innovations in our proposed SFE that enable accurate ExG …

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A 12-bit 1-GS/s Current-Steering DAC With Paired Current Source Switching Background Mismatch Calibration

A 12-bit 1-GS/s Current-Steering DAC With Paired Current Source Switching Background Mismatch Calibration 150 150

Abstract:

This article presents a spur-suppressed background calibration technique for high-speed current-steering digital-to-analog converters (DACs), based on a paired current source (CS) switching scheme. In conventional background calibration, periodic switching of CSs to and from the calibration mode introduces unwanted glitches that appear as spurious tones. The proposed technique introduces an …

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A K/Ka-Band Transmit/Receive Front-End With Triple-Coupled Transformer Technique in 65-nm Bulk CMOS

A K/Ka-Band Transmit/Receive Front-End With Triple-Coupled Transformer Technique in 65-nm Bulk CMOS 150 150

Abstract:

This article presents a K/Ka-band transmit/receive (T/R) front-end for jointed sensing and communication (JSAC) applications. A reconfigurable matching network for both signal reception and transmission is realized using the proposed triple-coupled transformer (TCT) technique, achieving low power loss and a compact footprint. The T/R switch at …

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A 136.6-dB-DR 174.3-dB-FoMS Versatile Current-to-Digital Converter With a Truncated-Noise-Shaped Baseline-Servo-Loop

A 136.6-dB-DR 174.3-dB-FoMS Versatile Current-to-Digital Converter With a Truncated-Noise-Shaped Baseline-Servo-Loop 150 150

Abstract:

This article presents a high-resolution, wide dynamic-range (DR) current-to-digital converter (IDC) capable of directly digitizing a broad range of bio-current signals. To achieve high resolution, the IDC uses a second-order continuous-time delta–sigma modulator (CT-DSM) architecture with a low-noise current-recycling operational amplifier (op-amp) and a highly linear pseudo-differential voltage-controlled oscillator (…

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A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays

A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays 150 150

Abstract:

This article proposes a design methodology for achieving intrinsic performance resilience in power amplifiers (PAs) against antenna impedance variations inherent to modern phased-array systems through the improvement of the PA output matching ( $S!_{22}$ ). This goal, however, presents a challenge for conventional cascode PAs due to their inherently high output impedance …

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A Sub-Threshold Oscillator-Based High-Accuracy Temperature Sensor With Tolerance to Supply Fluctuation and Device Aging

A Sub-Threshold Oscillator-Based High-Accuracy Temperature Sensor With Tolerance to Supply Fluctuation and Device Aging 150 150

Abstract:

Accurate, low-power, and compact temperature sensors are demanded in a wide range of biomedical, environmental, and industrial sensing applications. This article presents an accurate and precise CMOS temperature sensor based on a sub-threshold ring oscillator (RO) in 180 nm. The sensing core employs a five-stage super cut-off contention-free (SCCF) delay cell …

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