Sensitivity

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A Stress- and Temperature-Compensated TMR Current Sensor With ±0.13% Sensitivity Variation

A Stress- and Temperature-Compensated TMR Current Sensor With ±0.13% Sensitivity Variation 150 150
Author(s): Tianxiang Qu, Nan Wang, Zuo Zhang, Longxi Xiang, Ting Yi, Zhiliang Hong, Xiaoyang Zeng, Jiawei Xu

Abstract:

This article presents a high-precision tunnel magnetoresistance (TMR)-based non-contact current sensor with enhanced immunity to sensitivity drift. A background sensitivity stabilization loop (SSL) continuously regulates the TMR bias voltage to compensate intrinsic sensitivity variations. Through this closed-loop regulation, sensitivity drift of the TMR sensor induced by temperature, mechanical stress, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3719689
Publisher: IEEE

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A Low-Power 10Mbps Squaring-First UWB Receiver Using Frequency Hopping and Two-Tone Modulation

A Low-Power 10Mbps Squaring-First UWB Receiver Using Frequency Hopping and Two-Tone Modulation 150 150
Author(s): Lexie Drackley, Aman Gupta, David D. Wentzloff

Abstract:

This paper presents a low-power 10Mbps squaring-first ultra-wideband (UWB) receiver using frequency hopping code-division multiple-access (FH-CDMA) and two-tone OOK modulation for wireless personal area networks (WPAN). The two-tone receiver architecture preserves IF filtering, improves resilience to narrowband interference, and saves power by eliminating the RF local oscillator. FH is applied …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3716852
Publisher: IEEE

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PANDA: A Reconfigurable Seizure Prediction and Detection Neural Network Accelerator for Epilepsy Monitoring

PANDA: A Reconfigurable Seizure Prediction and Detection Neural Network Accelerator for Epilepsy Monitoring 150 150
Author(s): Siyuan Qiu, Xiaoyi Song, Xiangjie Song, Changchun Zhou, Xiaoyan Song, Jie Yang, Wenjin Wang, Yuchao Yang, Hailong Jiao

Abstract:

For effective healthcare management of epilepsy patients in a non-hospital environment, continuous monitoring of EEG signals is crucial, where wearable intelligent devices are essential. The existing seizure monitoring devices, however, cannot achieve high sensitivity, a short detection latency, a low false alarm rate (FAR), as well as ultra-low-power computing simultaneously. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3699609
Publisher: IEEE

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A MEMS-Free 4096-Pixel CMOS E-Nose Array With MOF-Based Molecular Selectivity, In-Pixel Thermal Regeneration, and a Compact Single-Coefficient Bandpass Sigma–Delta ADC

A MEMS-Free 4096-Pixel CMOS E-Nose Array With MOF-Based Molecular Selectivity, In-Pixel Thermal Regeneration, and a Compact Single-Coefficient Bandpass Sigma–Delta ADC 150 150
Author(s): Marco Saif, Adam Y. Wang, Shao-Wei Lo, Fuze Jiang, Zhikai Huang, Jiachen Wang, Hangxing Liu, Chih-Jen Shih, Thomas Burger, Hua Wang

Abstract:

This work presents a CMOS-only [micro-electromechanical systems (MEMS)-free] electronic nose (e-nose) for concurrent multi-gas-sensing applications. The proposed system integrates 4096 capacitance-to-digital converter (CDC) pixels, each implementing a compact bandpass sigma–delta ( $\Sigma \Delta $ ) ADC with a single feedback coefficient and no additional feedforward or feedback paths, achieving each pixel footprint …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3685410
Publisher: IEEE

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A 54- $\\mu$ W Design-Agnostic Clock, Voltage, and EM-Pulse Fault-Injection Attack Detection Using Time-to-Voltage Conversion

A 54- $\\mu$ W Design-Agnostic Clock, Voltage, and EM-Pulse Fault-Injection Attack Detection Using Time-to-Voltage Conversion 150 150
Author(s): Yudhajit Ray, Archisman Ghosh, Sarthak Antal, Shreyas Sen

Abstract:

This article presents a state-of-the-art design-agnostic clock, voltage, and electromagnetic pulse (EMP)-based fault-injection attack (FIA) detector. The efficient conversion of time-to-voltage information by integrating amplifiers transforms the time anomaly into the voltage domain, enabling its detection at a lower power consumption. The clock-glitch detector design consumes only $53~\mu $ W …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3655593
Publisher: IEEE

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A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management

A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management 150 150
Author(s): Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh S. Sathe

Abstract:

This article presents a fine-grained thermal sensing network for thermal management in SoCs. Sensor nodes in this network are made up of joint supply voltage ( $V_{\mathrm {dd}}$ ) and temperature ( $T$ ) sensors, which are compact and highly digital. Measurements from these simple but imperfect sensors are jointly processed to extract …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3621280
Publisher: IEEE

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1.58-b FeFET-Based Ternary Neural Networks: Achieving Robust Compute-In-Memory With Weight-Input Transformations

1.58-b FeFET-Based Ternary Neural Networks: Achieving Robust Compute-In-Memory With Weight-Input Transformations 150 150
Author(s): Imtiaz Ahmed, Akul Malhotra, Revanth Koduru, Sumeet Kumar Gupta

Abstract:

Ternary weight neural networks (TWNs), with weights quantized to three states (−1, 0, and 1), have emerged as promising solutions for resource-constrained edge artificial intelligence (AI) platforms due to their high energy efficiency with acceptable inference accuracy. Further energy savings can be achieved with TWN accelerators utilizing techniques such as compute-in-memory (CiM) and …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 157 – 165
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3621160
Publisher: IEEE

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A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS

A 48-Gb/s Inductorless PAM-4 Optical Receiver With 1.28-pJ/bit Efficiency in 28-nm CMOS 150 150
Author(s): Chongyun Zhang, Li Wang, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue

Abstract:

This work presents a 48-Gb/s four-level pulse amplitude modulation (PAM-4) optical receiver (ORX) with a linear analog front-end (AFE) and an integrated sampler. The AFE employs a transadmittance-stage transimpedance-stage (TAS-TIS) topology, replacing conventional CML-based variable gain amplifiers (VGAs) and post-amplifiers, avoiding continuous-time linear equalizers and passive inductors while preserving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3607107
Publisher: IEEE

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A 19.5-GHz Radiation-Hardened Sub-Sampled PLL With Quad-Core VCO in 16-nm FinFET Achieving Sub-50 fs Jitter

A 19.5-GHz Radiation-Hardened Sub-Sampled PLL With Quad-Core VCO in 16-nm FinFET Achieving Sub-50 fs Jitter 150 150
Author(s): David Dolt, Samuel Palermo

Abstract:

This letter presents a radiation-hardened (rad-hard) subsampled phase-locked loop (SS-PLL) that achieves state-of-the-art jitter performance while incorporating radiation-hardened techniques to mitigate single-event-upsets (SEUs) present in the space environment. Furthermore, rad-hard techniques are incorporated in each core PLL subblock which include a rad-hard charge-pump Gm cell, a pulser circuit with triple …

Published in: IEEE Solid-State Circuits Letters
Page(s): 285 – 288
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3610901
Publisher: IEEE

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